Renesas SH7124 R5F7124, Hardware Manual

Page: 216 / 782

Section 9 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 3.00 Sep. 27, 2007 Page 196 of 758
REJ09B0243-0300
Bit Bit Name
Initial
Value
R/W Description
2 TGFC 0 R/(W) *
1
Input Capture/Output Compare Flag C
Status flag that indicates the occurrence of TGRC input
capture or compare match in channels 0, 3, and 4.
Only 0 can be written, for flag clearing. In channels 1
and 2, bit 2 is reserved. It is always read as 0 and the
write value should always be 0.
[Setting conditions]
•
When TCNT = TGRC and TGRC is functioning as
output compare register
•
When TCNT value is transferred to TGRC by input
capture signal and TGRC is functioning as input
capture register
[Clearing condition]
•
When 0 is written to TGFC after reading TGFC =
1 *
2
1 TGFB 0 R/(W) *
1
Input Capture/Output Compare Flag B
Status flag that indicates the occurrence of TGRB input
capture or compare match. Only 0 can be written, for
flag clearing.
[Setting conditions]
•
When TCNT = TGRB and TGRB is functioning as
output compare register
•
When TCNT value is transferred to TGRB by input
capture signal and TGRB is functioning as input
capture register
[Clearing condition]
•
When 0 is written to TGFB after reading TGFB =
1 *
2