Renesas SH7124 R5F7124, Hardware Manual

Page: 180 / 782

Section 9 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 3.00 Sep. 27, 2007 Page 160 of 758
REJ09B0243-0300
Register Name Abbrevia-
tion
R/W
Initial value
Address
Access Size
Timer waveform control
register TWCR R/W H'00 H'FFFFC260 8
Timer start register TSTR R/W H'00 H'FFFFC280 8, 16
Timer synchronous register TSYR R/W H'00 H'FFFFC281 8
Timer counter synchronous
start register TCSYSTR R/W H'00 H'FFFFC282 8
Timer read/write enable
register TRWER R/W H'01 H'FFFFC284 8
Timer control register_0 TCR_0 R/W H'00 H'FFFFC300 8, 16, 32
Timer mode register_0 TMDR_0 R/W H'00 H'FFFFC301 8
Timer I/O control register H_0 TIORH_0 R/W H'00 H'FFFFC302 8, 16
Timer I/O control register L_0 TIORL_0 R/W H'00 H'FFFFC303 8
Timer interrupt enable
register_0 TIER_0 R/W H'00 H'FFFFC304 8, 16, 32
Timer status register_0 TSR_0 R/W H'C0 H'FFFFC305 8
Timer counter_0 TCNT_0 R/W H'0000 H'FFFFC306 16
Timer general register A_0 TGRA_0 R/W H'FFFF H'FFFFC308 16, 32
Timer general register B_0 TGRB_0 R/W H'FFFF H'FFFFC30A 16
Timer general register C_0 TGRC_0 R/W H'FFFF H'FFFFC30C 16, 32
Timer general register D_0 TGRD_0 R/W H'FFFF H'FFFFC30E 16
Timer general register E_0 TGRE_0 R/W H'FFFF H'FFFFC320 16, 32
Timer general register F_0 TGRF_0 R/W H'FFFF H'FFFFC322 16
Timer interrupt enable
register 2_0 TIER2_0 R/W H'00 H'FFFFC324 8, 16
Timer status register 2_0 TSR2_0 R/W H'C0 H'FFFFC325 8
Timer buffer operation transfer
mode register_0 TBTM_0 R/W H'00 H'FFFFC326 8
Timer control register_1 TCR_1 R/W H'00 H'FFFFC380 8, 16
Timer mode register_1 TMDR_1 R/W H'00 H'FFFFC381 8
Timer I/O control register_1 TIOR_1 R/W H'00 H'FFFFC382 8
Timer interrupt enable
register_1 TIER_1 R/W H'00 H'FFFFC384 8, 16, 32
Timer status register_1 TSR_1 R/W H'C0 H'FFFFC385 8