Section 9 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 3.00 Sep. 27, 2007 Page 275 of 758
REJ09B0243-0300
TGRA_3
TCDR
TGRA_4
TGRC_4
TDDR
H'0000
Buffer register
TGRC_4
Temporary register
TEMP2
Compare register
TGRA_4
Output waveform
Output waveform
Tb2
Ta
Tb1
Ta
Tb2
Ta
TCNT_3
TCNT_4
TCNTS
(Output waveform is active-low)
H'6400
H'0080
H'6400
H'6400
H'0080
H'0080
Transfer from temporary
register to compare register
Transfer from temporary
register to compare register
Figure 9.40 Example of Complementary PWM Mode Operation
Summary of Contents for SH7124 R5F7124
Page 2: ...Rev 3 00 Sep 27 2007 Page ii of xx ...
Page 8: ...Rev 3 00 Sep 27 2007 Page viii of xx ...
Page 36: ...Section 1 Overview Rev 3 00 Sep 27 2007 Page 16 of 758 REJ09B0243 0300 ...
Page 68: ...Section 2 CPU Rev 3 00 Sep 27 2007 Page 48 of 758 REJ09B0243 0300 ...
Page 108: ...Section 5 Exception Handling Rev 3 00 Sep 27 2007 Page 88 of 758 REJ09B0243 0300 ...
Page 166: ...Section 7 User Break Controller UBC Rev 3 00 Sep 27 2007 Page 146 of 758 REJ09B0243 0300 ...
Page 724: ...Section 20 List of Registers Rev 3 00 Sep 27 2007 Page 704 of 758 REJ09B0243 0300 ...
Page 772: ...Rev 3 00 Sep 27 2007 Page 752 of 758 REJ09B0243 0300 ...
Page 778: ...Rev 3 00 Sep 27 2007 Page 758 of 758 REJ09B0243 0300 ...
Page 781: ......