Section 13 A/D Converter (ADC)
Rev. 3.00 Sep. 27, 2007 Page 483 of 758
REJ09B0243-0300
Table 13.3 Channel Select List
Analog Input Channels
Bit 2
Bit 1
Bit 0
Single Mode
4-Channel Scan Mode
*
CH2 CH1 CH0
A/D_0
A/D_1
A/D_0
A/D_1
0 0 0
AN0
AN4
AN0
AN4
1
AN1
AN5
AN0, AN1
AN4, AN5
1
0
AN2
AN6
AN0 to AN2
AN4 to AN6
1
AN3
AN7
AN0 to AN3
AN4 to AN7
1 0 0
1
1
0
1
Setting prohibited Setting prohibited
Setting prohibited
Setting prohibited
Analog Input Channels
Bit 2
Bit 1
Bit 0
2-Channel Scan Mode
*
CH2 CH1 CH0
A/D_0
A/D_1
0 0 0
AN0
AN4
1
AN0, AN1
AN4, AN5
1
0
AN2
AN6
1
AN2, AN3
AN6, AN7
1 0 0
1
1
0
1
Setting prohibited
Setting prohibited
Notes:
*
Continuous scan mode or single-scan mode can be selected with the ADCS bit.
Summary of Contents for SH7124 R5F7124
Page 2: ...Rev 3 00 Sep 27 2007 Page ii of xx ...
Page 8: ...Rev 3 00 Sep 27 2007 Page viii of xx ...
Page 36: ...Section 1 Overview Rev 3 00 Sep 27 2007 Page 16 of 758 REJ09B0243 0300 ...
Page 68: ...Section 2 CPU Rev 3 00 Sep 27 2007 Page 48 of 758 REJ09B0243 0300 ...
Page 108: ...Section 5 Exception Handling Rev 3 00 Sep 27 2007 Page 88 of 758 REJ09B0243 0300 ...
Page 166: ...Section 7 User Break Controller UBC Rev 3 00 Sep 27 2007 Page 146 of 758 REJ09B0243 0300 ...
Page 724: ...Section 20 List of Registers Rev 3 00 Sep 27 2007 Page 704 of 758 REJ09B0243 0300 ...
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