HP AE370A - Brocade 4Gb SAN Switch 4/12, Administrator'S Manual

Page: 296 / 447

296 Troubleshooting
To test a switch’s internal components
1. Connect to the switch and log in as
admin
.
2. Connect the port you want to test to any other switch port with the cable you want to test.
3. Enter the
crossporttest -lb_mode 5
command where
5
is the operand that causes the test to be
run on the internal switch components (this is a partial list—refer to the Fabric OS Command Reference
Manual for additional command information):
[
-nframes count ]
—Specify the number of frames to send.
[
-lb_mode mode
]—Select the loopback point for the test.
[
-spd_mode mode
—Select the speed mode for the test.
[
-ports itemlist
]—Specify a list of user ports to test.
To test components to and from the HBA
1. Connect to the switch and log in as
admin
.
2. Enter the
fPortTest
command (refer to the Fabric OS Command Reference Manual for information
on the command options).
This example executed the
fPortTest
command 100 times on port 8 with payload pattern 0xaa55,
pattern width 2 (meaning word width) and a default payload size of 512 bytes.
Refer to Table 61 for a list of additional tests that can be used to determine the switch components that are
not functioning properly. Refer to the Fabric OS Command Reference Manual for additional command
information.
switchname:admin> fporttest 100,8,0xaa55,2, 512
Will use pattern: aa55 aa55 aa55 aa55 aa55 aa55 ...
Running fPortTest ........
port 8 test passed.
value = 0
Table 61 Switch component tests
Test Function
portloopbacktest Functional test of port N to N path.
portregtest
A read and write test of the ASIC SRAMs and registers.
spinsilk Functional test of internal and external transmit and receive paths at full
speed.
sramretentiontest Verifies that the data written into the miscellaneous SRAMs in the ASIC are
retained after a 10-second wait.
crossporttest Verifies the functional components of the switch.
turboramtest Verifies that the on chip SRAM located in the 2 Gbit/sec ASIC is using the
Turbo-Ram BIST circuitry. These same SRAMs are tested by
portregtest
and
sramretentiontest
using PCI operations, but for this test the BIST
controller is able to perform the SRAM write and read operations at a much
faster rate.
statstest Verifies that the ASIC statistics counter logic.
Related Switch Test Option:
itemlist
Restricts the items to be tested to a smaller set of parameter values that you
pass to the switch.