Freescale Semiconductor PXR4030, Reference Manual

Page: 562 / 1434

Enhanced Direct Memory Access Controller (eDMA)
21-38 Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
167–175 /
0x14 [7:15]
CITER
Current major iteration count. This 9 or 15-bit count represents the current major loop count
for the channel. It is decremented each time the minor loop is completed and updated in the
transfer control descriptor memory. After the major iteration count is exhausted, the channel
performs a number of operations (for example, final source and destination address
calculations), optionally generating an interrupt to signal channel completion before reloading
the CITER field from the beginning iteration count (BITER) field.
Note: When the CITER field is initially loaded by software, it must be set to the same value
as that contained in the BITER field.
Note: If the channel is configured to execute a single service request, the initial values of
BITER and CITER should be 0x0001.
176–191 /
0x14 [16:31]
DOFF
Destination address signed Offset. Sign-extended offset applied to the current destination
address to form the next-state value as each destination write is completed.
192–223 /
0x18 [0:31]
DLAST_SGA
Last destination address adjustment or the memory address for the next transfer control
descriptor to be loaded into this channel (scatter-gather).
If scatter-gather processing for the channel is disabled (EDMA_x_TCD.E_SG = 0) then
• Adjustment value added to the destination address at the completion of the outer major
iteration count.
This value can be applied to restore the destination address to the initial value, or adjust the
address to reference the next data structure.
Otherwise,
• This address points to the beginning of a 0-modulo-32 byte region containing the next
transfer control descriptor to be loaded into this channel. This channel reload is performed
as the major iteration count completes. The scatter-gather address must be 0-modulo-32
byte, otherwise a configuration error is reported.
224 /
0x1C [0]
BITER.E_LINK
Enables channel-to-channel linking on minor loop complete. As the channel completes the
inner minor loop, this flag enables the linking to another channel, defined by
BITER.LINKCH[0:5]. The link target channel initiates a channel service request via an internal
mechanism that sets the EDMA_x_TCD.START bit of the specified channel. If channel linking
is disabled, the BITER value is extended to 15 bits in place of a link channel number. If the
major loop is exhausted, this link mechanism is suppressed in favor of the MAJOR.E_LINK
channel linking.
0 The channel-to-channel linking is disabled.
1 The channel-to-channel linking is enabled.
Note: When the TCD is first loaded by software, this field must be set equal to the
corresponding CITER field. Otherwise, a configuration error is reported. As the major
iteration count is exhausted, the contents of this field is reloaded into the CITER field.
225–230 /
0x1C [1:6]
BITER
or
BITER.LINKCH
Starting major iteration count or link channel number.
If channel-to-channel linking is disabled (EDMA_x_TCD.BITER.E_LINK = 0), then
• No channel-to-channel linking (or chaining) is performed after the inner minor loop is
exhausted. TCD bits [225:239] are used to form a 15-bit BITER field.
Otherwise,
• After the minor loop is exhausted, the DMA engine initiates a channel service request at
the channel, defined by BITER.LINKCH[0:5], by setting that channel’s
EDMA_x_TCD.START bit.
Note: When the TCD is first loaded by software, this field must be set equal to the
corresponding CITER field. Otherwise, a configuration error is reported. As the major
iteration count is exhausted, the contents of this field is reloaded into the CITER field.
Table 21-21. TCDn Field Descriptions (continued)
Field Description