Freescale Semiconductor PXR4030, Reference Manual

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Interrupts and Interrupt Controller (INTC)
10-32 Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
INTC current priority register (INTC_CPR). The results of those comparisons are used to manage the
priority of the ISR being executed by the processor. The LIFO also assists in managing that priority.
10.4.2.1 Current Priority and Preemption
The priority arbitrator, selector, encoder, and comparator submodules shown in Figure 10-1 are used to
compare the priority of the asserted interrupt requests to the current priority. If the priority of any asserted
peripheral or software configurable interrupt request is higher than the current priority, then the interrupt
request to the processor is asserted. Also, a unique vector for the preempting peripheral or software
configurable interrupt request is generated for INTC interrupt acknowledge register (INTC_IACKR), and
if in hardware vector mode, for the interrupt vector provided to the processor.
10.4.2.1.1 Priority Arbitrator Submodule
The priority arbitrator submodule compares all the priorities of all of the asserted interrupt requests, both
peripheral and software configurable. The output of the priority arbitrator submodule is the highest of
those priorities. Also, any interrupt requests which have this highest priority are output as asserted
interrupt requests to the request selector submodule.
10.4.2.1.2 Request Selector Submodule
If only one interrupt request from the priority arbitrator submodule is asserted, then it is passed as asserted
to the vector encoder submodule. If multiple interrupt requests from the priority arbitrator submodule are
asserted, then only the one with the lowest vector is passed as asserted to the vector encoder submodule.
The lower vector is chosen regardless of the time order of the assertions of the peripheral or software
configurable interrupt requests.
10.4.2.1.3 Vector Encoder Submodule
The vector encoder submodule generates the unique 9-bit vector for the asserted interrupt request from the
request selector submodule.
10.4.2.1.4 Priority Comparator Submodule
The priority comparator submodule compares the highest priority output from the priority arbitrator
submodule with PRI in INTC_CPR. If the priority comparator submodule detects that this highest priority
is higher than the current priority, then it asserts the interrupt request to the processor. This interrupt request
to the processor asserts whether this highest priority is raised above the value of PRI in INTC_CPR or the
PRI value in INTC_CPR is lowered below this highest priority. This highest priority then becomes the new
priority which is written to PRI in INTC_CPR when the interrupt request to the processor is
acknowledged. Interrupt requests whose PRI
n in INTC_PSR n are zero does not cause a preemption
because their PRI n is not higher than PRI in INTC_CPR.
Another function of the priority comparator subblock is to signal an update of the INTC_IACKR_PRC0
and INTC_IACKR_PRC1 with the vector number of the first interrupt that arrives that has a priority higher
than the current priority. Once the vector number and priority are captured, they cannot be superseded by
a higher priority interrupt until an update of the INTC_CPR_PRC0 or INTC_CPR_PRC1 occurs.