Freescale Semiconductor PXR4030, Reference Manual

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Enhanced Queued Analog-to-Digital Converter (EQADC)
Freescale Semiconductor 27-63
PXR40 Microcontroller Reference Manual, Rev. 1
Read Configuration Command Format for On-Chip ADC Operation
Figure 27-46 describes the command message format for a read configuration command when interfacing
with the on-chip ADCs. A read configuration command is used to read the contents of the on-chip ADC
registers which are only accessible via command messages. Read configuration commands are
differentiated from write configuration commands by an asserted R/W bit.
Figure 27-46. Read Configuration Command Format for On-Chip ADC Operation
Table 27-34. Field Descriptions
Field Description
0
EOQ
End Of Queue Bit
1
PAUSE
Pause Bit
2
REP
Repeat/loop Start Point Indication Bit
3–4 Reserved
5
EB
Must be 0b0
6
BN
Buffer Number Bit. Refer to Section , Conversion Command Format for the Standard Configuration.
7
R/W
Read/Write bit. A negated R/W indicates a write configuration command.
0 Write1Read
8–15
ADC_REGISTER_
HIGH_BYTE
ADC Register High Byte Field. REGISTER_HIGH_BYTE is the value to be written into the most significant
8 bits of control/configuration register when the R/W bit is negated.
16–23
ADC_REGISTER_
LOW_BYTE
ADC Register Low Byte Field. REGISTER_LOW_BYTE is the value to be written into the least significant
8 bits of a control/configuration register when the R/W bit is negated.
24–31
ADC_REG_
ADDRESS
ADC Register Address. The ADC_REG_ADDRESS field selects a register on the ADC register set to be
written or read. Only half-word addresses can be used.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
EOQ PAUSE REP RESERVED
EB
(0b0)
BN
R/W
(0b1)
MESSAGE_TAG RESERVED
CFIFO Header ADC Command
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
RESERVED ADC_REG_ADDRESS
ADC Command