HV100 Series High Performance Current Vector Inverter
41
08.08
Sampling period T
Sampling period is the sampling period of feedback, and
the regulator operates once in each sampling period.
The larger the sampling period, the slower the response,
but the better the suppression effect on interference
signal, so it is generally unnecessary to set it; 0.00:
automatic.
0.01
~
10.00s
0.10
○
08.09
Deviation limit
The deviation limit is the ratio of the absolute value of the
deviation between the feedback amount and the given
amount of the system. When the feedback amount is
within the deviation limit, the PID adjustment will not act.
0.0
~
100.0
%
0.0%
○
08.10
Closed loop preset
frequency
This function code defines the frequency and running
time of inverter before PID is put into operation when PID
control is effective. In some control systems, in order to
make the controlled object reach the preset value
quickly, the inverter forcibly outputs a certain frequency
value of 08.10 and a frequency holding time of 08.11
according to the setting of this function code. That is,
when the control object is close to the control target, the
PID controller is put into operation to improve the
response speed.
0.00
~
Upper
limit
frequency
0.00
○
08.11
Preset frequency
holding time
0.0
~
3600.0s
0.0
×
08.12
Sleep mode
0: Invalid
1: Sleep when the feedback pressure exceeds or falls
below the sleep threshold
2: Sleep when feedback pressure and output frequency
are stable
3: Reserved
0
~
3
1
×
08.13
Selection of sleep
stop mode
0: Deceleration stop
1: Free stop
0
~
1
0
○
08.14
Deviation between
feedback and set
pressure when
entering sleep
08.12=1 schematic diagram (sleep mode 1)
0.0
~
10.0
%
0.5%
○
08.15
Sleep threshold
0.0 ~
200.0% * set
pressure
100.0%
○
08.16
Wake threshold
0.0 ~
200.0% * set
pressure
90.0%
○
08.17
Sleep delay time
0.0
~
3600.0s
100.0
○