Omron CP1H-CPU - 05-2006, Operation Manual

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62
Specifications
Section 2-2
Analog I/O Specifications
Note (1) The built-in analog input switch is used for toggling between voltage input
and current input. (The default setting at the time of shipping is for voltage
input.)
(2) Switching between 1/6,000 and 1/12,000 resolution is done in the PLC
Setup. The same resolution setting is used for all I/O words. It is not pos-
sible to set them individually.
(3) The total conversion time is the total of the conversion times for all the
points that are used. It would be 6 ms for 4 analog inputs and 2 analog
outputs.
Model CP1H-XA40DR-A
CP1H-XA40DT-D
CP1H-XA40DT1-D
Item Voltage I/O (See note 1.) Current I/O (See note 1.)
Analog
Input Sec-
tion Number of
inputs 4 inputs (4 words allocated)
Input signal
range 0 to 5 V, 1 to 5 V, 0 to 10 V, or
−
10 to 10 V 0 to 20 mA or 4 to 20 mA
Max. rated input
±
15 V
±
30 mA
External input
impedance 1 M
Ω
min. Approx. 250
Ω
Resolution 1/6000 or 1/12000 (full scale) (See note 2.)
Overall accu-
racy 25
°
C:
±
0.3% full scale/0 to 55
°
C:
±
0.6% full
scale
25
°
C:
±
0.4% full scale/0 to 55
°
C:
±
0.8% full
scale
A/D conversion
data Full scale for
−
10 to 10 V: F448 (E890) to 0BB8 (1770) hex
Full scale for other ranges: 0000 to 1770 (2EE0) hex
Averaging func-
tion Supported (Set for individual inputs in the PLC Setup.)
Open-circuit
detection func-
tion Supported (Value when disconnected: 8000 hex)
Analog Out-
put Section Number of out-
puts 2 outputs (2 words allocated)
Output signal
range 0 to 5 V, 1 to 5 V, 0 to 10 V, or
−
10 to 10 V 0 to 20 mA or 4 to 20 mA
Allowable exter-
nal output load
resistance 1 k
Ω
min. 600
Ω
max.
External output
impedance 0.5
Ω
max. ---
Resolution 1/6000 or 1/12000 (full scale) (See note 2.)
Overall accu-
racy 25
°
C:
±
0.4% full scale/0 to 55
°
C:
±
0.8% full scale
D/A conversion
data Full scale for
−
10 to 10 V: F448 (E890) to 0BB8 (1770) hex
Full scale for other ranges: 0000 to 1770 (2EE0) hex
Conversion time 1 ms/point (See note 3.)
Isolation method Photocoupler isolation between analog I/O terminals and internal circuits. No isolation
between analog I/O signals.