212
High-speed Counters
Section 5-2
5-2-4
PLC Setup
The settings for high-speed counters 0 to 3 are located in the Built-in Input
Tab of the CX-Programmer’s PLC Settings Window.
Settings in the Built-
in Input Tab
5-2-5
High-speed Counter Terminal Allocation
The following diagrams show the input terminals that can be used for high-
speed counters in each CPU Unit.
Item
Setting
Use high speed counter 0 to 3 Use counter
Counting mode
Linear mode
Circular mode (ring mode)
Circular Max. Count
(max. ring count)
0 to 4,294,967,295 (0 to FFFF FFFF hex)
Reset method
Phase Z and software reset
Software reset
Phase Z and software reset (continue comparing)
Software reset (continue comparing)
Input Setting
Differential phase inputs (4x)
Pulse + direction inputs
Up/Down inputs
Increment pulse input
Summary of Contents for CP1H-CPU - 05-2006
Page 2: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised May 2006...
Page 3: ...iv...
Page 11: ...xii TABLE OF CONTENTS...
Page 15: ...xvi...
Page 19: ...xx...
Page 31: ...xxxii Conformance to EC Directives 6...
Page 71: ...40 Function Blocks Section 1 5...
Page 133: ...102 Computing the Cycle Time Section 2 7...
Page 169: ...138 CPM1A Expansion I O Unit Wiring Section 3 6...
Page 411: ...380 Clock Section 6 8...
Page 519: ...488 Replacing User serviceable Parts Section 10 2...
Page 527: ...496 Standard Models Appendix A...
Page 535: ...504 Dimensions Diagrams Appendix B...
Page 628: ...597 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 629: ...598 Connections to Serial Communications Option Boards Appendix F...
Page 659: ...628 PLC Setup Appendix G...
Page 665: ...634 Index work words 159 write protection 370...
Page 667: ...636 Revision History...