174
Data Registers
Section 4-16
Normal instructions can be used to store data in Data Registers.
Forcing Bit Status
Bits in Data Registers cannot be force-set and force-reset.
Examples
The following examples show how Data Registers are used to offset the PLC
memory addresses in Index Registers.
LD
DR0 ,IR0
Adds the contents of DR0 to the contents
of IR0 and loads the bit at that PLC mem-
ory address.
MOV(021) #0001 DR0 ,IR1
Adds the contents of DR0 to the contents
of IR1 and writes #0001 to that PLC
memory address.
Range of Values
The contents of data registers are treated as signed binary data and thus
have a range of –32,768 to 32,767.
Data Register Initialization
The Data Registers will be cleared in the following cases:
1.
When the operating mode is changed from PROGRAM mode to
RUN/MONITOR mode or vice-versa and the IOM Hold Bit is OFF
2.
When the power is cycled and the IOM Hold Bit is OFF or not protected in
the PLC Setup
IOM Hold Bit Operation
If the IOM Hold Bit (A500.12) is ON, the Data Registers won’t be cleared
when a FALS error occurs or the operating mode is changed from PROGRAM
mode to RUN/MONITOR mode or vice-versa.
If the IOM Hold BIt (A500.12) is ON and the PLC Setup’s “IOM Hold Bit Status
at Startup” setting is set to protect the IOM Hold Bit, the Data Registers won’t
be cleared when the PLC’s power supply is reset (ON
→
OFF
→
ON).
Precautions
Data Registers are normally local to each task. For example, DR0 used in
task 1 is different from DR0 used in task 2. (A PLC Setup setting can be made
from the CX-Programmer to share Data Registers between tasks.)
The content of Data Registers cannot be accessed (read or written) from the
CX-Programmer.
Do not use Data Registers until a value has been set in the register. The reg-
ister’s operation will be unreliable if they are used without setting their values.
The values in Data Registers are unpredictable at the start of an interrupt
task. When a Data Register will be used in an interrupt task, always set a
value in the Data Register before using the register in that task.
Set to a base value
with MOVR(560) or
MOVRW(561).
Set with a regular
instruction.
Pointer
I/O Memory
Hexadecimal content
Decimal equivalent
8000 to FFFF
–32,768 to –1
0000 to 7FFF
0 to 32,767
Summary of Contents for CP1H-CPU - 05-2006
Page 2: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised May 2006...
Page 3: ...iv...
Page 11: ...xii TABLE OF CONTENTS...
Page 15: ...xvi...
Page 19: ...xx...
Page 31: ...xxxii Conformance to EC Directives 6...
Page 71: ...40 Function Blocks Section 1 5...
Page 133: ...102 Computing the Cycle Time Section 2 7...
Page 169: ...138 CPM1A Expansion I O Unit Wiring Section 3 6...
Page 411: ...380 Clock Section 6 8...
Page 519: ...488 Replacing User serviceable Parts Section 10 2...
Page 527: ...496 Standard Models Appendix A...
Page 535: ...504 Dimensions Diagrams Appendix B...
Page 628: ...597 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 629: ...598 Connections to Serial Communications Option Boards Appendix F...
Page 659: ...628 PLC Setup Appendix G...
Page 665: ...634 Index work words 159 write protection 370...
Page 667: ...636 Revision History...