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High-speed Counters
Section 5-2
When the High-speed Counter Gate Bit is turned OFF again, the high-speed
counter will resume counting and the counter PV will be refreshed.
Restrictions
• The Gate Bit will be disabled if the high-speed counter's reset method is
set to Phase-Z Software reset and the Reset Bit is ON (waiting
for the phase-Z input to reset the counter PV.)
High-speed Counter Frequency Measurement
This function measures the frequency of the high-speed counter (input
pulses.)
The input pulse frequency can be read by executing the PRV(881) instruction.
The measured frequency is output in 8-digit hexadecimal and expressed in
Hz. The frequency measurement function can be used with high-speed
counter 0 only.
The frequency can be measured while a high-speed counter 0 comparison
operation is in progress. Frequency measurement can be performed at the
same time as functions such as the high-speed counter and pulse output with-
out affecting the performance of those functions.
Procedure
1,2,3...
1.
High-speed Counter Enable/Disable Setting (Required)
Select the Use high speed counter 0 Option in the PLC Setup.
2.
Pulse Input Mode Setting (Required)
Set the High-speed Counter 0 Pulse Input Mode (Input Setting) in the PLC
Setup.
3.
Counting Mode Setting (Required)
Set the High-speed Counter 0 Counting Mode in the PLC Setup.
If ring mode counting is selected, set the High-speed Counter 0 Circular
Max. Count (max. ring count) in the PLC Setup.
4.
Reset Method Setting (Required)
Set the High-speed Counter 0 Reset Method in the PLC Setup.
5.
PRV(881) Instruction Execution (Required)
N: Specify the high-speed counter number. (High-speed counter 0: #0010)
C: #0003 (Read frequency)
D: Destination word for frequency data
Restrictions
• The frequency measurement function can be used with high-speed
counter 0 only.
Specifications
Item
Specifications
Number of frequency
measurement inputs
1 input (high-speed counter 0 only)
Frequency measurement
range
High-speed counter 0 in X/XA CPU Units:
Differential phase inputs: 0 to 50 kHz
All other input modes: 0 to 100 kHz
High-speed counter 0 in Y CPU Units:
Differential phase inputs: 0 to 500 kHz
All other input modes: 0 to 1 MHz
Note If the frequency exceeds the maximum value, the maxi-
mum value will be stored.
Summary of Contents for CP1H-CPU - 05-2006
Page 2: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised May 2006...
Page 3: ...iv...
Page 11: ...xii TABLE OF CONTENTS...
Page 15: ...xvi...
Page 19: ...xx...
Page 31: ...xxxii Conformance to EC Directives 6...
Page 71: ...40 Function Blocks Section 1 5...
Page 133: ...102 Computing the Cycle Time Section 2 7...
Page 169: ...138 CPM1A Expansion I O Unit Wiring Section 3 6...
Page 411: ...380 Clock Section 6 8...
Page 519: ...488 Replacing User serviceable Parts Section 10 2...
Page 527: ...496 Standard Models Appendix A...
Page 535: ...504 Dimensions Diagrams Appendix B...
Page 628: ...597 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 629: ...598 Connections to Serial Communications Option Boards Appendix F...
Page 659: ...628 PLC Setup Appendix G...
Page 665: ...634 Index work words 159 write protection 370...
Page 667: ...636 Revision History...