532
Auxiliary Area Allocations by Address
Appendix D
A275
A275.09 High-speed
Counter 1
Overflow/
Underflow
Flag
This flag indicates when an overflow
or underflow has occurred in the
high-speed counter 1 PV. (Used with
the linear mode counting range only.)
Cleared when operation starts.
Cleared when the PV is changed.
OFF: Normal
ON: Overflow or underflow
---
---
Cleared
Refreshed
when an
overflow or
underflow
occurs.
---
A275.10 High-speed
Counter 1
Count Direc-
tion
This flag indicates whether the high-
speed counter is currently being
incremented or decremented. The
counter PV for the current cycle is
compared with the PC in last cycle to
determine the direction.
OFF: Decrementing
ON: Incrementing
---
---
Cleared
Setting
used for
high-speed
counter,
valid dur-
ing counter
operation.
---
A276
and
A277
All
Pulse Output
0 PV
Contain the number of pulses output
from the corresponding pulse output
port.
PV range: 80000000 to 7FFFFFFF
hex
(-2,147,483,648 to 2,147,483,647)
When pulses are being output in the
CW direction, the PV is incremented
by 1 for each pulse.
When pulses are being output in the
CCW direction, the PV is decre-
mented by 1 for each pulse.
PV after overflow: 7FFFFFFF hex
PV after underflow: 80000000 hex
A277 contains the leftmost 4 digits
and A276 contains the rightmost 4
digits of the pulse output 0 PV.
A279 contains the leftmost 4 digits
and A278 contains the rightmost 4
digits of the pulse output 1 PV.
Cleared when operation starts.
Note
If the coordinate system is
relative coordinates (unde-
fined origin), the PV will be
cleared to 0 when a pulse
output starts, i.e. when a
pulse output instruction
(SPED(885), ACC(888), or
PLS2(887)) is executed.
---
---
Cleared
Refreshed
each cycle
during
oversee
process.
Refreshed
when the
INI(880)
instruction
is exe-
cuted (PV
change).
---
A278
and
A279
All
Pulse Output
1 PV
Cleared
---
A280
A280.00 Pulse Output
0 Accel/Decel
Flag
This flag will be ON when pulses are
being output from pulse output 0
according to an ACC(888) or
PLS2(887) instruction and the output
frequency is being changed in steps
(accelerating or decelerating).
Cleared when operation starts or
stops.
OFF: Constant speed
ON: Accelerating or decelerating
---
---
Cleared
Refreshed
each cycle
during
oversee
process.
---
A280.01 Pulse Output
0
Overflow/
Underflow
Flag
This flag indicates when an overflow
or underflow has occurred in the
pulse output 0 PV.
Cleared when operation starts.
OFF: Normal
ON: Overflow or underflow
---
---
Cleared
Cleared
when the
PV is
changed
by the
INI(880)
instruction.
Refreshed
when an
overflow or
underflow
occurs.
---
Address
Name
Function
Settings
Status
after
mode
change
Status
at star-
tup
Write
timing
Related
flags, set-
tings
Words
Bits
Summary of Contents for CP1H-CPU - 05-2006
Page 2: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised May 2006...
Page 3: ...iv...
Page 11: ...xii TABLE OF CONTENTS...
Page 15: ...xvi...
Page 19: ...xx...
Page 31: ...xxxii Conformance to EC Directives 6...
Page 71: ...40 Function Blocks Section 1 5...
Page 133: ...102 Computing the Cycle Time Section 2 7...
Page 169: ...138 CPM1A Expansion I O Unit Wiring Section 3 6...
Page 411: ...380 Clock Section 6 8...
Page 519: ...488 Replacing User serviceable Parts Section 10 2...
Page 527: ...496 Standard Models Appendix A...
Page 535: ...504 Dimensions Diagrams Appendix B...
Page 628: ...597 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 629: ...598 Connections to Serial Communications Option Boards Appendix F...
Page 659: ...628 PLC Setup Appendix G...
Page 665: ...634 Index work words 159 write protection 370...
Page 667: ...636 Revision History...