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204
High-speed Counters
Section 5-2
5-1-6
External Interrupts
An external interrupt task performs interrupt processing in the CPU Unit in
response to an input from a CJ-series Special I/O Unit or CPU Bus Unit con-
nected to the CPU Unit. The reception of these interrupts is always enabled.
External interrupts require no special settings in the CPU Unit, although an
interrupt task with the specified number must be included in the user program.
Example: External interrupt from a CJ1W-CT021-V1 High-speed Counter Unit
Note
When the same interrupt number is used for both an external interrupt task
(task 0 to 255), and scheduled interrupt task (task 2) or high-speed counter
interrupt task (0 to 255), the task will be executed for both the external inter-
rupt condition and the other interrupt condition. As a general rule, do not use
the same interrupt number for different interrupt conditions.
5-2
High-speed Counters
5-2-1
Overview
• A rotary encoder can be connected to a built-in input to produce a high-
speed pulse input.
• High-speed interrupt processing can be performed when the high-speed
counter PV matches a target value or is within a target value range.
• The PRV(881) instruction can be used to measure the input pulse fre-
quency (one input only).
• The high-speed counter PVs can be maintained or refreshed.
• The High-speed Counter Gate Bit can be turned ON/OFF from the ladder
program to select whether the high-speed counter PVs will be maintained
or refreshed.
• Any one of the following input signals can be selected as the counter input
mode.
Response Frequencies for 24 VDC Inputs to High-speed Counters 0 to 3
in X/XA CPU Units or High-speed Counters 2 and 3 in Y CPU Units:
• Differential phase inputs (4x): 50 kHz
• Pulse + direction inputs: 100 kHz
• Up/Down pulse inputs: 100 kHz
• Increment pulse inputs: 100 kHz
Response Frequencies for Line Driver Inputs to High-speed Counters 0
and 1 in Y CPU Units:
• Differential phase inputs (4x): 500 kHz
• Pulse + direction inputs: 1 MHz
• Up/Down pulse inputs: 1 MHz
• Increment pulse inputs: 1 MHz
CP1H CPU Unit
High-speed Counter Unit
Interrupt
Summary of Contents for CP1H-CPU - 05-2006
Page 2: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised May 2006...
Page 3: ...iv...
Page 11: ...xii TABLE OF CONTENTS...
Page 15: ...xvi...
Page 19: ...xx...
Page 31: ...xxxii Conformance to EC Directives 6...
Page 71: ...40 Function Blocks Section 1 5...
Page 133: ...102 Computing the Cycle Time Section 2 7...
Page 169: ...138 CPM1A Expansion I O Unit Wiring Section 3 6...
Page 411: ...380 Clock Section 6 8...
Page 519: ...488 Replacing User serviceable Parts Section 10 2...
Page 527: ...496 Standard Models Appendix A...
Page 535: ...504 Dimensions Diagrams Appendix B...
Page 628: ...597 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 629: ...598 Connections to Serial Communications Option Boards Appendix F...
Page 659: ...628 PLC Setup Appendix G...
Page 665: ...634 Index work words 159 write protection 370...
Page 667: ...636 Revision History...