99
Computing the Cycle Time
Section 2-7
been executed. The length of the interrupt response time for I/O interrupt
tasks depends on the following conditions.
Note
(1) The wait time occurs when there is competition with other interrupts. As
a guideline, the wait time will be 3 to 153
µ
s.
(2) I/O interrupt tasks can be executed during execution of the user program
(even while an instruction is being executed by stopping the execution of
an instruction), I/O refresh, peripheral servicing, or overseeing. The inter-
rupt response time is not affected by which of the above processing op-
erations during which the interrupt inputs turns ON. I/O interrupts,
however, are not executed during execution of other interrupt tasks even
if the I/O interrupt conditions are satisfied. Instead, the I/O interrupts are
executed in order of priority after the current interrupt task has completed
execution and the software interrupt response time has elapsed.
The interrupt response time of input interrupt tasks is calculated as follows:
Interrupt response time = Input ON delay + Software interrupt response time
Scheduled Interrupt Tasks
The interrupt response time of scheduled interrupt tasks is the time taken
from after the scheduled time specified by the MSKS(690) instruction has
elapsed until the interrupt task has actually been executed. The length of the
interrupt response time for scheduled interrupt tasks is 1 ms max. There is
also an error of 80
µ
s in the time to the first scheduled interrupt (0.5 ms min.).
Note Scheduled interrupt tasks can be executed during execution of the user pro-
gram (even while an instruction is being executed by stopping the execution of
an instruction), I/O refresh, peripheral servicing, or overseeing. The interrupt
response time is not affected by which of the above processing operations
during which the scheduled interrupt time occurs. Scheduled interrupts, how-
ever, are not executed during execution of other interrupt tasks even if the
interrupt conditions are satisfied. Instead, the interrupts are executed in order
of priority after the current interrupt task has completed execution and the
software interrupt response time has elapsed.
Item
Interrupt response time
Counter interrupts
Hardware response
Rise time: 50
µ
s
---
Fall time: 50
µ
s
---
Software interrupt
response
Minimum: 98
µ
s
Minimum: 187
µ
s
Maximum: 198
µ
s + Wait
time (See note 1.)
Maximum: 287
µ
s + Wait time
(See note1.)
Input
(Interrupt signal retrieval)
Interrupt task execution
Input interrupt task
response time
Software interrupt response time
Input ON delay
Cyclic task execution
(main program)
Ladder program
execution time
Return time from
input interrupt task
Next interrupt signal
can be accepted.
The time from completing the ladder program in the input
interrupt task until returning to cyclic task execution is 60
µ
s.
Summary of Contents for CP1H-CPU - 05-2006
Page 2: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised May 2006...
Page 3: ...iv...
Page 11: ...xii TABLE OF CONTENTS...
Page 15: ...xvi...
Page 19: ...xx...
Page 31: ...xxxii Conformance to EC Directives 6...
Page 71: ...40 Function Blocks Section 1 5...
Page 133: ...102 Computing the Cycle Time Section 2 7...
Page 169: ...138 CPM1A Expansion I O Unit Wiring Section 3 6...
Page 411: ...380 Clock Section 6 8...
Page 519: ...488 Replacing User serviceable Parts Section 10 2...
Page 527: ...496 Standard Models Appendix A...
Page 535: ...504 Dimensions Diagrams Appendix B...
Page 628: ...597 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 629: ...598 Connections to Serial Communications Option Boards Appendix F...
Page 659: ...628 PLC Setup Appendix G...
Page 665: ...634 Index work words 159 write protection 370...
Page 667: ...636 Revision History...