CHAPTER 10 SERIAL INTERFACE FUNCTION
User’s Manual U15195EJ5V0UD
411
10.2.3 Control registers
(1) Asynchronous serial interface mode register 0 (ASIM0)
The ASIM0 register is an 8-bit register that controls the UART0 transfer operation.
This register can be read/written in 8-bit or 1-bit units.
Cautions 1. When using UART0, be sure to set the external pins related to UART0 functions to the
control made before setting clock select register 0 (CKSR0) and the baud rate generator
control register (BRGC0), and then set the UARTCAE0 bit to 1. Then set the other bits.
2. Set the UARTCAE0 and RXE0 bits to 1 while a high level is input to the RXD0 pin. If
these bits are set to 1 while the pin is at low level, reception is started.
(1/3)
<7>
UARTCAE0
ASIM0
<6>
TXE0
<5>
RXE0
4
PS1
3
PS0
2
CL
1
SL
0
ISRM
Address
FFFFFA00H
After reset
01H
Bit position
Bit name
Function
7 UARTCAE0
Controls the operating clock.
0: Stops clock supply to UART0.
1: Supplies clock to UART0.
Cautions 1. If UARTCAE0 = 0, UART0 is asynchronously reset
Note
.
2. If UARTCAE0 = 0, UART0 is reset. To operate UART0, first set
UARTCAE0 to 1.
3. If the UARTCAE0 bit is cleared from 1 to 0, all the registers of
UART0 are initialized. To set UARTCAE0 to 1 again, be sure to
re-set the registers of UART0.
The output of the TXD0 pin goes high when transmission is disabled, regardless of
the setting of the UARTCAE0 bit.
6 TXE0
Enables/disables transmission.
0: Disables transmission
1: Enables transmission
Cautions 1. Set the TXE0 bit to 1 after setting the UARTCAE0 bit to 1 at
startup. Set the UARTCAE0 bit to 0 after setting the TXE0 bit to
0 to stop.
2. To initialize the transmission unit, clear (0) the TXE0 bit, and
after letting 2 Clock cycles (base clock) elapse, set (1) the TXE0
bit again. If the TXE0 bit is not set again, initialization may not
be successful. (For details about the base clock, refer to 10.2.6
(1) (a) Base clock (Clock).)
Note
The ASIS0, ASIF0, and RXB0 registers are reset.
