CHAPTER 2 PIN FUNCTIONS
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User’s Manual U15195EJ5V0UD
(7) PCT0, PCT1, PCT4, PCT6 (Port CT) … I/O
PCT0, PCT1, PCT4, and PCT6 function as a 4-bit I/O port in which input or output can be set in 1-bit units.
Besides functioning as a port, in control mode, these pins operate as control signal output for when memory
is expanded externally.
Port or control mode can be selected as the operation mode for each bit, specified by the port CT mode
control register (PMCCT).
(a) Port mode
PCT0, PCT1, PCT4, and PCT6 can be set to input or output in 1-bit units using the port CT mode register
(PMCT).
(b) Control mode
PCT0, PCT1, PCT4, and PCT6 can be set to port or control mode in 1-bit units using PMCCT.
(i) LWR (Lower byte write strobe) … Output
This is a strobe signal that shows that the bus cycle being executed is a write cycle for SRAM,
external ROM, or an external peripheral I/O area.
In the data bus, the lower byte is valid. If the bus cycle is a lower memory write, it becomes active at
the falling edge of the CLKOUT signal in the T1 state and becomes inactive at the falling edge of the
CLKOUT signal in the T2 state.
(ii) UWR (Higher byte write strobe) … Output
This is a strobe signal that shows that the bus cycle being executed is a write cycle for SRAM,
external ROM, or an external peripheral I/O area.
In the data bus, the higher byte is valid. If the bus cycle is a higher memory write, it becomes active
at the falling edge of the CLKOUT signal in the T1 state and becomes inactive at the falling edge of
the CLKOUT signal in the T2 state.
(iii) RD (Read strobe) … Output
This is a strobe signal that shows that the bus cycle being executed is a read cycle for SRAM,
external ROM, or external peripheral I/O. It is inactive in the idle state (TI).
(iv) ASTB (Address strobe) … Output
This is the external address bus latch strobe signal output pin.
Output becomes low level in synchronization with the falling edge of the clock in the T1 state of the
bus cycle, and high level in synchronization with the falling edge of the clock in the T3 state.
