CHAPTER 10 SERIAL INTERFACE FUNCTION
User’s Manual U15195EJ5V0UD
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(4) Reception operation
The reception wait status is entered by setting the RXE1 bit of the ASIM10 register to 1. To start the
reception operation, first perform start bit detection. Start bit detection is done by performing sampling of the
RXD1 pin. When the reception operation is started, serial data is stored in the receive shift register in order
at the set baud rate. Each time reception of 2 frames or 1 frame of RXB1 or RXBL1 data has been
completed, a reception completion interrupt (INTSR1) is generated. Receive data is transmitted from the
reception buffer (RXB1/RXBL1) to memory when this interrupt is serviced.
(a) Reception enabled status
The reception operation is enabled by setting (1) the RXE1 bit of the ASIM10 register.
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RXE1 = 1: Reception enabled status
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RXE1 = 0: Reception disabled status
In the reception disabled status, the reception hardware is in standby in an initialized state. At this time,
no reception completion interrupt is generated, and the contents of the reception buffer are held.
(b) Start of reception operation
The reception operation is started by detection of the start bit.
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In asynchronous mode (MOD bit of ASIM11 register = 0)
The RXD1 pin is sampled using the serial clock from the baud rate generator. After 8 serial clocks
have been output following detection of the falling edge of the RXD1 pin, the RXD1 pin is again
sampled. If a low level is detected at this time, the falling edge of the RXD1 pin is interpreted as a
start bit, the operation shifts to reception processing, and the RXD1 pin input is sampled from this
point on in units of 16 serial clock output.
If the high level is detected during sampling after 8 serial clocks from detection of the falling edge of
the RXD1 pin, this falling edge is not recognized as a start bit. The serial clock counter that generates
the sample timing is initialized and stops, and input of the next falling edge is waited for.
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In synchronous mode (MOD bit of ASIM11 register = 1)
The RXD1 pin is sampled using the serial clock from the baud rate generator or at the rising edge of
serial clock input/output. If the RXD1 pin is low level at this time, this is interpreted as a start bit and
reception processing starts.
If reception data is interrupted at the fixed low level during reception, reception of this receive data
(including error detection) is completed and reception completion interrupt is generated. However, even
if the RXD line is fixed at low level, the next reception operation is not started (start bit detection is not
performed).
Be sure to set the high level when restarting the reception operation. If the high level is not set, the start
bit detection position becomes undefined, and correct reception operation cannot be performed.
