CHAPTER 9 TIMER/COUNTER FUNCTION
315
User’s Manual U15195EJ5V0UD
(ii) Mode 2 (PRM10 register’s PRM12 bit = 1, PRM11 bit = 0, PRM10 bit = 1)
The count conditions in mode 2 are as follows.
•
TM10 up count upon detection of valid edge of TIUD10 pin
•
TM10 down count upon detection of valid edge of TCUD10 pin
Caution If the count clock is simultaneously input to the TIUD10 pin and the TCUD10 pin,
count operation is not performed and the immediately preceding value is held.
Figure 9-53. Mode 2 (When Rising Edge Is Specified as Valid Edge of TIUD10, TCUD10 Pins)
0006H
TIUD10
TCUD10
TM10
0007H
0008H
Up count
Hold value
Down count
0007H
0006H
0005H
(iii) Mode 3 (PRM10 register’s PRM12 = 1, PRM11 = 1, PRM10 = 0)
In mode 3, when two signals 90 degrees out of phase are input to the TIUD10 and TCUD10 pins, the
level of the TCUD10 pin is sampled at the input of the valid edge of the TIUD10 pin (Refer to
Figure
9-54
).
If the TCUD10 pin level sampled at the valid edge input to the TIUD10 pin is low, TM10 counts down
when the valid edge is input to the TIUD10 pin.
If the TCUD10 pin level sampled at the valid edge input to the TIUD10 pin is high, TM10 counts up
when the valid edge is input to the TIUD10 pin.
Figure 9-54. Mode 3 (When Rising Edge Is Specified as Valid Edge of TIUD10 Pin)
0007H
TIUD10
TCUD10
TM10
0008H
Up count
Down count
0009H
000AH
0009H
0008H
0007H
