CHAPTER 9 TIMER/COUNTER FUNCTION
305
User’s Manual U15195EJ5V0UD
(6) Prescaler mode register 10 (PRM10)
The PRM10 register is used to perform the following selections.
•
Selection of count clock in general-purpose timer mode (CMD bit of TUM0 register = 0)
•
Selection of count operation mode in UDC mode (CMD = 1)
PRM10 can be read/written in 8-bit or 1-bit units.
Cautions 1. Overwriting the PRM10 register during TM10 operation (TM1CE0 bit = 1) is prohibited.
2. Clearing the PRM12 bit to 0 is prohibited in UDC mode (CMD bit of TUM0 register = 1).
3. When TM10 is in mode 4, specification of the valid edge for the TIUD10 and TCUD10
pins is valid.
7
0
PRM10
6
0
5
0
4
0
3
0
2
PRM12
1
PRM11
0
PRM10
Address
FFFFF5EEH
After reset
07H
Bit position
Bit name
Function
Specifies the up/down count operation mode during input of the clock rate when the
internal clock of the TM10 is used, or during external clock (TIUD10) input.
CMD = 0
CMD = 1
PRM12 PRM11 PRM10
Count clock
Count clock
UDC mode
0 0 0
Setting
prohibited
0 0 1
f
CLK
/2
0 1 0
f
CLK
/4
0 1 1
f
CLK
/8
Setting prohibited
1 0 0
f
CLK
/16 Mode
1
1 0 1
f
CLK
/32 Mode
2
1 1 0
f
CLK
/64 Mode
3
1 1 1
f
CLK
/128
TIUD10
Mode 4
2 to 0
PRM12 to
PRM10
Remark
f
CLK
: Base clock
(a) In general-purpose timer mode (CMD bit of TUM0 register = 0)
The count clock is specified by bits PRM12 to PRM10.
(b) UDC mode (CMD bit of TUM0 register = 1)
The TM10 count triggers in the UDC mode are as follows.
Operation Mode
TM10 Operation
Mode 1
Down count when TCUD10 = high level
Up count when TCUD10 = low level
Mode 2
Up count upon detection of valid edge of TIUD10 input
Down count upon detection of valid edge of TCUD10 input
Mode 3
Up count upon detection of valid edge of TIUD10 input when TCUD10 = high level
Down count upon detection of valid edge of TIUD10 input when TCUD10 = low level
Mode 4
Automatic judgment upon detection of both edges of TIUD10 input and both edges of TCUD10 input
