NEC PD703114, User Manual

Page: 306 / 692

CHAPTER 9 TIMER/COUNTER FUNCTION
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User’s Manual U15195EJ5V0UD
(7) Status register 0 (STATUS0)
The STATUS0 register indicates the operating status of TM10.
STATUS0 is read-only, in 8-bit or 1-bit units.
7
0 STATUS0
6
0
5
0
4
0
3
0
<2>
TM1UDF0
<1>
TM1OVF0
<0>
TM1UBD0
Address
FFFFF5EFH
After reset
00H
Bit position Bit name Function
2 TM1UDF0 TM10 underflow flag
0: No TM10 count underflow
1: TM10 count underflow
Caution The TM1UDF0 bit is cleared (to 0) upon completion of a read access
to the STATUS0 register from the CPU.
1 TM1OVF0 TM10 overflow flag
0: No TM10 count overflow
1: TM10 count overflow
Caution The TM1OVF0 bit is cleared (to 0) upon completion of a read access
to the STATUS0 register from the CPU.
0 TM1UBD0 Indicates the operating status of TM10 up/down count.
0: TM10 up count in progress
1: TM10 down count in progress
Caution The state of the TM1UBD0 bit differs according to the mode as
follows.
•
The TM1UBD0 bit is fixed to 0 in general-purpose timer mode
(CMD bit of TUM0 register = 0).
•
The TM1UBD0 bit indicates the TM10 up-/down-count status in
UDC mode (CMD bit of TUM0 register = 1).
(8) CC101 capture input selection register (CSL10)
The CSL10 register is used to select the INTP101 or INTP100 pin to input a capture signal when the CC101
register is used as a capture register.
CSL10 can be read/written in 8-bit or 1-bit units.
7
0 CSL10
6
0
5
0
4
0
3
0
2
0
1
0
0
CSL0
Address
FFFFF5F6H
After reset
00H
Bit position Bit name Function
0 CSL0 Specifies capture input to CC101.
0: INTP101
1: INTP100