CHAPTER 9 TIMER/COUNTER FUNCTION
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User’s Manual U15195EJ5V0UD
(2) Timer control register 30 (TMC30)
The TMC30 register controls the operation of TM3.
This register can be read/written in 8-bit or 1-bit units.
Cautions 1. The TM3CAE bit and other bits cannot be set at the same time. Be sure to set the
TM3CAE bit and then set the other bits and the other registers of TM3. When using an
external pin related to the timer function when using timer 3, be sure to set (1) the CAE
bit after setting the external pin to the control mode.
2. If occurrence of an overflow contends with writing to the TMC30 register, the value of
the TM3OVF bit is the value written to the TMC30 register.
(1/2)
<7>
TM3OVF
TMC30
6
CS2
5
CS1
4
CS0
3
0
2
0
<1>
TM3CE
<0>
TM3CAE
Address
FFFFF686H
After reset
00H
Bit position
Bit name
Function
7
TM3OVF
Flag that indicates TM3 overflow.
0: No overflow
1: Overflow
The TM3OVF bit becomes 1 when TM3 changes from FFFFH to 0000H. An overflow
interrupt request (INTTM3) is generated at the same time. However, if CC30 is set to
the compare mode (CMS0 bit of the TMC31 register = 1) and match clear during
comparison of TM3 and CC30 is enabled (CCLR bit of TMC31 register = 1), and TM3
is cleared to 0000H following match at FFFFH, TM3 is considered to have been
cleared and the TM3OVF bit does not become 1, nor is the INTTM3 interrupt
generated.
The TM3OVF bit holds a “1” until 0 is written to it or an asynchronous reset is applied
while the TM3CAE bit = 0. Interrupts by overflow and the TM3OVF bit are
independent, and even if the TM3OVF bit is manipulated, this does not affect the
interrupt request flag for INTTM3 (TM3IF0). If an overflow occurs while the TM3OVF
bit is being read, the value of the flag changes and the value is returned at the next
read.
