APPENDIX D REVISION HISTORY
688
User's Manual U15195EJ5V0UD
(3/7)
Edition
Major Revision up to Previous Edition
Applied to:
Modification of description in
9.3.4 (1) Timer 1/timer 2 clock selection register (PRM02)
Modification of description in
9.3.4 (2) Timer 2 clock stop register 0 (STOPTE0)
Addition of
Caution
and modification in
9.3.4 (5) Timer 2 time base control register 0 (TCRE0)
Addition of
Note
and deletion of
Caution
in
Figure 9-95 Cycle Measurement Operation
Timing Example
Modification of description in
Figure 9-97 Example of Timing During TM4 Operation
CHAPTER 9
TIMER/COUNTER
FUNCTION (REAL-
TIME PULSE UNIT)
Modification of
Caution
in
10.2.3 (1) Asynchronous serial interface mode register 0 (ASIM0)
Change of description on bits that can be manipulated in
10.2.3 (2) Asynchronous serial
interface status register 0 (ASIS0)
Addition of Caution and modification of description in
10.2.3 (3) Asynchronous serial
interface transmission status register 0 (ASIF0)
Change of description on bits that can be manipulated in
10.2.3 (4) Receive buffer register
(RXB0)
Change of description on bits that can be manipulated in
10.2.3 (5) Transmit buffer register 0
(TXB0)
Addition and modification of description in
10.2.5 (3) Continuous transmission operation
Addition of
Figure 10-5 Continuous Transmission Processing Flow
Addition of
Note
and change of description in table in
Figure 10-6 Continuous Transmission
Starting Procedure
Change of description of table in
Figure 10-7 Continuous Transmission End Procedure
Addition of
Cautions
in
Figure 10-8 Asynchronous Serial Interface Reception Completion
Interrupt Timing
Change of description on bits that can be manipulated and addition of
Caution
in
10.2.6 (2) (a)
Clock select register 0 (CKSR0)
Change of description on bits that can be manipulated in
10.2.6 (2) (b) Baud rate generator
control register 0 (BRGC0)
Addition of (2) in
10.2.7 Cautions
Change of description on bits that can be manipulated in
10.3.3 (4) 2-frame continuous
reception buffer register 1 (RXB1)/receive buffer register L1 (RXBL1)
Addition of Caution in
10.3.4 (1) Reception completion interrupt (INTSR1)
Addition of
10.3.5 (3) Continuous transmission of 3 or more frames
Change of description on bits that can be manipulated in
10.3.7 (2) (c) Prescaler compare
register 1 (PRSCM1)
Addition of
10.3.7 (3) Allowable baud rate range during reception
Addition of
10.3.7 (4) Transfer rate in 2-frame continuous reception
Change of description on bits that can be manipulated in
10.4.3 (4) Clocked serial interface
receive buffer registers L0, L1 (SIRBL0, SIRBL1)
Change of description on bits that can be manipulated in
10.4.3 (6) Clocked serial interface
read-only receive buffer registers L0, L1 (SIRBEL0, SIRBEL1)
Change of description on bits that can be manipulated in
10.4.3 (8) Clocked serial interface
transmit buffer registers L0, L1 (SOTBL0, SOTBL1)
Change of description on bits that can be manipulated in
10.4.3 (10) Clocked serial interface
initial transmit buffer registers L0, L1 (SOTBFL0, SOTBFL1)
Change of description on bits that can be manipulated in
10.4.3 (12) Serial I/O shift registers
L0, L1 (SIOL0, SIOL1)
Modification of caution description in
10.4.6 (2) (b) Prescaler mode register 3 (PRSM3)
2nd
Change of description on bits that can be manipulated and
Caution
in
10.4.6 (2) (c) Prescaler
compare register 3 (PRSCM3)
CHAPTER 10
SERIAL
INTERFACE
FUNCTION
