CHAPTER 4 BUS CONTROL FUNCTION
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User’s Manual U15195EJ5V0UD
4.5.2 Bus sizing function
The bus sizing function controls the data bus width for each CS space. The data bus width is specified by using
the bus size configuration register (BSC).
(1) Bus size configuration register (BSC)
This register can be read/written in 16-bit units.
Only the BS00 bit is valid in the V850E/IA2. This register is not affected by other bit settings.
Cautions 1. Write to the BSC register after reset, and then do not change the set values. Also, do
not access an external memory area other than the one for this initialization routine
until the initial setting of the BSC register is complete. However, it is possible to
access external memory areas whose initial settings are complete.
2.
When the data bus width is specified as 8 bits, only the signals shown below become
active.
LWR: When accessing SRAM, external ROM, or external I/O (write cycle)
15
0
BSC
CSn signal
Address
FFFFF066H
After reset
5555H
14
BS70
13
0
12
BS60
11
0
10
BS50
9
0
8
BS40
7
0
6
BS30
5
0
4
BS20
3
0
2
BS10
1
0
0
BS00
CS3
CS2
CS1
CS0
CS4
CS5
CS6
CS7
Bit position
Bit name
Function
Sets the data bus width of CSn space.
BSn0
Data bus width of CSn space
0
8 bits
1
16 bits
14, 12, 10, 8,
6, 4, 2, 0
BSn0
(n = 0 to 7)
