CHAPTER 9 TIMER/COUNTER FUNCTION
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(11) Capture/compare register 100 (CC100)
CC100 is a 16-bit register. It can be specified as a capture register or as a compare register using
capture/compare control register 0 (CCR0). CC100 can be read/written in 16-bit units.
Cautions 1. When used as a capture register (CMS0 bit of CCR0 register = 0), write access is
prohibited.
2. When used as a compare register (CMS0 bit of CCR0 register = 1) during TM10
operation (TM1CE0 bit of TMC10 register = 1), overwriting the CC100 register values is
prohibited.
3. When TM10 has been stopped (TM1CE0 bit of TMC10 register = 0), the capture trigger is
disabled.
4. When the operation mode is changed from capture register to compare register, set a
new compare value.
5. Continuous reading of CC100 is prohibited. If CC100 is continuously read, the second
read value may differ from the actual value. If CC100 must be read twice, be sure to
read another register between the first and the second read operation.
14
13
12
2
3
4
5
6
7
8
9
10
11
15
1
0
CC100
Address
FFFFF5E6H
After reset
0000H
(a) When set as a capture register
When CC100 is set as a capture register, the valid edge of the corresponding external interrupt signal
(INTP100) is detected as the capture trigger. TM10 latches the count value in synchronization with the
capture trigger (capture operation). The latched value is held in the capture register until the next capture
operation.
The valid edge of external interrupts (rising edge, falling edge, both rising and falling edges) is selected
by signal edge selection register 10 (SESA10).
When the CC100 register is specified as a capture register, interrupts are generated upon detection of
the valid edge of the INTP100 signal.
(b) When set as a compare register
When CC100 is set as a compare register, it always compares its own value with the value of TM10. If
the value of CC100 matches the value of the TM10, CC100 generates an interrupt signal (INTCC100).
