Hioki 8860-50, Instruction Manual

Page: 396 / 490

14.2 External I/O
384
Sampling can be synchronized across multiple instruments.
Connection example
14.2.4 Synchronized Sampling Output
(SYNC.OUT)
Synchronized Operation
Sync Signals
Output signal CMOS level output (0 to 5 V)
Output voltage range HIGH level: 4.0 to 5.0 V, LOW level: 0 to 0.5 V
Output clock frequency HIGH level: 30 ns, LOW level: 70 ns, frequency 100 ns
Output sync signal
(10 MHz)
Synchronized sampling measurement
SYNC.OUT
EXT.SMPL
Daisy-chain configuration
EXT.SMPL
SYNC.OUT
EXT.SMPL
SYNC.OUT
EXT.SMPL
SYNC.OUT
Using 1 master instrument, synchronize
sampling according to the sync signal input
to the EXT. SMPL terminal. (The sync sig-
nal is output by the master.)
As more instruments are connected, the dif-
ference between sampling timing on differ-
ent instruments becomes larger.
(Up to 3 instruments may be connected, in-
cluding the master)
Master
Slave
Slave
Set 1 instrument to Master, and set the others to Slave
With 1 instrument only, synchronized measurement is not possible and precise
measurement is not possible.
HIGH
4 to 5.0 V
LOW
0 to 0.5 V
GND
SYNC.OUT
70 ns
5.0 V
30 ns