Atmel SAM9X25, Manual

Page: 893 / 1145

893
11054A–ATARM–27-Jul-11
SAM9X25
893
11054A–ATARM–27-Jul-11
SAM9X25
Register. The TXRDY bit remains high until a second character is written in UART_THR. As
soon as the first character is completed, the last character written in UART_THR is transferred
into the shift register and TXRDY rises again, showing that the holding register is empty.
When both the Shift Register and UART_THR are empty, i.e., all the characters written in
UART_THR have been processed, the TXEMPTY bit rises after the last stop bit has been
completed.
Figure 40-10. Transmitter Control
40.5.4 DMA Support
Both the receiver and the transmitter of the UART are connected to a DMA Controller (DMAC)
channel.
The DMA Controller channels are programmed via registers that are mapped within the DMAC
user interface.
40.5.5 Test Modes
The UART supports three test modes. These modes of operation are programmed by using the
field CHMODE (Channel Mode) in the mode register (UART_MR).
The Automatic Echo mode allows bit-by-bit retransmission. When a bit is received on the URXD
line, it is sent to the UTXD line. The transmitter operates normally, but has no effect on the
UTXD line.
The Local Loopback mode allows the transmitted characters to be received. UTXD and URXD
pins are not used and the output of the transmitter is internally connected to the input of the
receiver. The URXD pin level has no effect and the UTXD line is held high, as in idle state.
The Remote Loopback mode directly connects the URXD pin to the UTXD line. The transmitter
and the receiver are disabled and have no effect. This mode allows a bit-by-bit retransmission.
UART_THR
Shift Register
UTXD
TXRDY
TXEMPTY
Data 0 Data 1
Data 0
Data 0
Data 1
Data 1 S
S
P P
Write Data 0
in UART_THR
Write Data 1
in UART_THR
stop
stop