Atmel SAM9X25, Manual

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11054A–ATARM–27-Jul-11
SAM9X25
170
11054A–ATARM–27-Jul-11
SAM9X25
21.3 CKGR Block Diagram
Figure 21-1. Clock Generator Block Diagram
21.4 Slow Clock Selection
The slow clock can be generated either by an external 32,768 Hz crystal or by the on-chip
32 kHz RC oscillator. The 32,768 Hz crystal oscillator can be bypassed by setting the bit
OSC32BYP to accept an external slow clock on XIN32.
The internal 32 kHz RC oscillator and the 32,768 Hz oscillator can be enabled by setting to 1,
respectively, RCEN bit and OSC32EN bit in the System Controller user interface. The OSCSEL
command selects the slow clock source.
Power
Management
Controller
XIN
XOUT
Main Clock
MAINCK
Control Status
PLLA and
Divider
PLLA Clock
PLLACK
12M Main
Oscillator
UPLL
On Chip
32K RC OSC
Slow Clock
SLCK
XIN32
XOUT32
Slow Clock
Oscillator
Clock Generator
RCEN
UPLLCK
OSCSEL
OSC32EN
OSC32BYP
On Chip
12M RC OSC
MOSCRCEN
MOSCSEL