Atmel SAM9X25, Manual

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11054A–ATARM–27-Jul-11
SAM9X25
54
11054A–ATARM–27-Jul-11
SAM9X25
11.2 Flow Diagram
The ROM Code implements the algorithm shown below in Figure 11-1 .
Figure 11-1. ROM Code Algorithm Flow Diagram
11.3 Chip Setup
At boot start-up, the processor clock (PCK) and the master clock (MCK) source is the 12 MHz
Fast RC Oscillator.
Initialization follows the steps described below:
1. Stack setup for ARM supervisor mode.
2. Main Oscillator Detection: the Main Clock is switched to the 32 kHz RC oscillator to
allow external clock frequency to be measured. Then the Main Oscillator is enabled and
set in bypass mode. If the MOSCSELS bit rises, an external clock is connected, and the
next step is Main Clock Selection (3)
. If not, the bypass mode is cleared to attempt
external quartz detection. This detection is successful when the MOSCXTS and
MOSCSELS bits rise, else the 12 MHz Fast RC internal oscillator is used as the Main
Clock.
3. Main Clock Selection : the Master Clock source is switched from the Slow Clock to the
Main Oscillator without prescaler. The PMC Status Register is polled to wait for MCK
Ready. PCK and MCK are now the Main Clock.
4. C variable initialization: non zero-initialized data is initialized in the RAM (copy from
ROM to RAM). Zero-initialized data is set to 0 in the RAM.
5. PLLA initialization : PLLA is configured to get a PCK at 96 MHz and an MCK at
48 MHz. If an external clock or crystal frequency running at 12 MHz is found, then the
PLLA is configured to allow communication on the USB link for the SAM-BA Monitor;
else the Main Clock is switched to the internal 12 MHz Fast RC, but USB will not be
activated.
SAM-BA Monitor
Copy and run it
in internal SRAM
Yes
Chip Setup
Valid boot code
found in one
NVM
No