Atmel SAM9X25, Manual

Page: 617 / 1145

617
11054A–ATARM–27-Jul-11
SAM9X25
The following flowchart ( Figure 34-10 ) shows how to manage read multiple block and write mul-
tiple block transfers with the DMA Controller. Polling or interrupt method can be used to wait for
the end of write according to the contents of the Interrupt Mask Register (HSMCI_IMR).
Figure 34-10. Read Multiple Block and Write Multiple Block
Notes: 1. It is assumed that this command has been correctly sent (see Figure 34-7 ).
2. Handle errors reported in HSMCI_SR.
Send SELECT/DESELECT_CARD
command
(1)
to select the card
Send SET_BLOCKLEN command
(1)
Set the block length
HSMCI_MR |= (BlockLength << 16)
Set the DMAEN bit
HSMCI_DMA |= DMAEN
Configure the HDMA channel X
DMAC_SADDRx and DMAC_DADDRx
DMAC_BTSIZE = BlockLength/4
Send WRITE_MULTIPLE_BLOCK or
READ_MULTIPLE_BLOCK command
(1)
Read status register DMAC_EBCISR
and Poll Bit CBTC[X]
New Buffer ?
(2)
No
DMAC_CHEN[X] = TRUE
Poll the bit
XFRDONE = 1
No
RETURN
Yes
Send STOP_TRANSMISSION
command
(1)
Yes
Read status register HSMCI_SR
and Poll Bit FIFOEMPTY