1055
11054A–ATARM–27-Jul-11
SAM9X25
1055
11054A–ATARM–27-Jul-11
SAM9X25
45.6.1
Network Control Register
Name:
EMAC_NCR
Address:
0xF802C000
Access:
Read-write
• LB: LoopBack
Asserts the loopback signal to the PHY.
• LLB: Loopback local
Connects
txd
to
rxd
,
tx_en
to
rx_dv
, forces full duplex and drives
rx_clk
and
tx_clk
with MCK divided by 4.
rx_clk
and
tx_clk
may glitch as the EMAC is switched into and out of internal loop back. It is important that receive
and transmit circuits have already been disabled when making the switch into and out of internal loop back.
• RE: Receive enable
When set, enables the EMAC to receive data. When reset, frame reception stops immediately and the receive FIFO is
cleared. The receive queue pointer register is unaffected.
• TE: Transmit enable
When set, enables the Ethernet transmitter to send data. When reset transmission, stops immediately, the transmit FIFO
and control registers are cleared and the transmit queue pointer register resets to point to the start of the transmit descrip-
tor list.
• MPE: Management port enable
Set to one to enable the management port. When zero, forces MDIO to high impedance state and MDC low.
• CLRSTAT: Clear statistics registers
This bit is write only. Writing a one clears the statistics registers.
• INCSTAT: Increment statistics registers
This bit is write only. Writing a one increments all the statistics registers by one for test purposes.
• WESTAT: Write enable for statistics registers
Setting this bit to one makes the statistics registers writable for functional test purposes.
• BP: Back pressure
If set in half duplex mode, forces collisions on all received frames.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
THALT
TSTART
BP
7
6
5
4
3
2
1
0
WESTAT
INCSTAT
CLRSTAT
MPE
TE
RE
LLB
LB
Summary of Contents for SAM9X25
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