1113
11054A–ATARM–27-Jul-11
SAM9X25
1113
11054A–ATARM–27-Jul-11
SAM9X25
SPI
6
SPCK falling to MISO
2.9
12.7
ns
SPI
7
MOSI Setup time before SPCK rises
2.0
ns
SPI
8
MOSI Hold time after SPCK rises
0
ns
SPI
9
SPCK rising to MISO
2.7
13.3
ns
SPI
10
MOSI Setup time before SPCK falls
1.7
ns
SPI
11
MOSI Hold time after SPCK falls
0
ns
SPI
12
NPCS0 setup to SPCK rising
3.8
ns
SPI
13
NPCS0 hold after SPCK falling
0
ns
SPI
14
NPCS0 setup to SPCK falling
3.5
ns
SPI
15
NPCS0 hold after SPCK rising
0
ns
SPI
16
NPCS0 falling to MISO valid
15.4
ns
Table 46-33.
SPI Timings with 3.3V Peripheral Supply (Continued)
Symbol
Parameter
Cond
Min
Max
Units
Table 46-34.
SPI Timings with 1.8V Peripheral Supply
Symbol
Parameter
Cond
Min
Max
Units
Master Mode
SPI
SPCK
SPI Clock
66
MHz
SPI
0
MISO Setup time before SPCK rises
15.9
ns
SPI
1
MISO Hold time after SPCK rises
0
ns
SPI
2
SPCK rising to MOSI
0
6.7
ns
SPI
3
MISO Setup time before SPCK falls
14.8
ns
SPI
4
MISO Hold time after SPCK falls
0
ns
SPI
5
SPCK falling to MOSI
0
6.8
ns
Slave Mode
SPI
6
SPCK falling to MISO
3.8
16.0
ns
SPI
7
MOSI Setup time before SPCK rises
2.2
ns
SPI
8
MOSI Hold time after SPCK rises
0
ns
SPI
9
SPCK rising to MISO
3.5
15.8
ns
SPI
10
MOSI Setup time before SPCK falls
1.8
ns
SPI
11
MOSI Hold time after SPCK falls
0.2
ns
SPI
12
NPCS0 setup to SPCK rising
4.0
ns
SPI
13
NPCS0 hold after SPCK falling
0
ns
SPI
14
NPCS0 setup to SPCK falling
3.6
ns
SPI
15
NPCS0 hold after SPCK rising
0
ns
SPI
16
NPCS0 falling to MISO valid
17.9
ns
Summary of Contents for SAM9X25
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Page 138: ...138 11054A ATARM 27 Jul 11 SAM9X25 138 11054A ATARM 27 Jul 11 SAM9X25...
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