Atmel SAM9X25, Manual

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SAM9X25
a. Write the starting source address in the DMAC_SADDRx register for channel x.
b. Write the starting destination address in the DMAC_DADDRx register for
channel x.
c. Program DMAC_CTRLAx, DMAC_CTRLBx and DMAC_CFGx according to Row
10 as shown in
Table 31-3 on page 479 . Program the DMAC_DSCRx register with
‘0’.
d. Write the control information for the DMAC transfer in the DMAC_CTRLAx and
DMAC_CTRLBx register for channel x. For example, in the register, you can pro-
gram the following:
– i. Set up the transfer type (memory or non-memory peripheral for source and
destination) and flow control device by programming the FC of the DMAC_CTRLBx
register.
– ii. Set up the transfer characteristics, such as:
– Transfer width for the source in the SRC_WIDTH field.
– Transfer width for the destination in the DST_WIDTH field.
– Source AHB master interface layer in the SIF field where source resides.
– Destination AHB master interface layer in the DIF field where destination resides.
– Incrementing/decrementing or fixed address for source in SRC_INCR field.
– Incrementing/decrementing or fixed address for destination in DST_INCR field.
e. If source picture-in-picture mode is enabled (DMAC_CTRLBx.SPIP is enabled),
program the DMAC_SPIPx register for channel x.
f. If destination picture-in-picture is enabled (DMAC_CTRLBx.DPIP), program the
DMAC_DPIPx register for channel x.
g. Write the channel configuration information into the DMAC_CFGx register for chan-
nel x. Ensure that the reload bits, DMAC_CFGx.SRC_REP,
DMAC_CFGx.DST_REP and DMAC_CTRLBx.AUTO are enabled.
– i. Designate the handshaking interface type (hardware or software) for the source
and destination peripherals. This is not required for memory. This step requires
programming the SRC_H2SEL/DST_h2SEL bits, respectively. Writing a ‘1’ activates
the hardware handshaking interface to handle source/destination requests for the
specific channel. Writing a ‘0’ activates the software handshaking interface to handle
source/destination requests.
– ii. If the hardware handshaking interface is activated for the source or destination
peripheral, assign handshaking interface to the source and destination peripheral.
This requires programming the SRC_PER and DST_PER bits, respectively.
3. After the DMAC selected channel has been programmed, enable the channel by writing
a ‘1’ to the DMAC_CHER.ENABLE[n] bit where is the channel number. Make sure that
bit 0 of the DMAC_EN register is enabled.
4. Source and destination request single and chunk DMAC transactions to transfer the
buffer of data (assuming non-memory peripherals). The DMAC acknowledges on com-
pletion of each chunk/single transaction and carry out the buffer transfer.
5. When the buffer transfer has completed, the DMAC reloads the DMAC_SADDRx,
DMAC_DADDRx and DMAC_CTRLAx registers. Hardware sets the buffer Complete
interrupt. The DMAC then samples the row number as shown in
Table 31-3 on page
479 . If the DMAC is in Row 1, then the DMAC transfer has completed. Hardware sets
the transfer complete interrupt and disables the channel. So you can either respond to
the Buffer Complete or Chained buffer transfer Complete interrupts, or poll for the