Atmel SAM9X25, Manual

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11054A–ATARM–27-Jul-11
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SAM9X25
29.9.3 Write Waveforms
The write protocol is similar to the read protocol. It is depicted in Figure 29-12 . The write cycle
starts with the address setting on the memory address bus.
29.9.3.1 NWE Waveforms
The NWE signal is characterized by a setup timing, a pulse width and a hold timing.
1. NWE_SETUP: the NWE setup time is defined as the setup of address and data before
the NWE falling edge;
2. NWE_PULSE: The NWE pulse length is the time between NWE falling edge and NWE
rising edge;
3. NWE_HOLD: The NWE hold time is defined as the hold time of address and data after
the NWE rising edge.
The NWE waveforms apply to all byte-write lines in Byte Write access mode: NWR0 to NWR3.
29.9.3.2 NCS Waveforms
The NCS signal waveforms in write operation are not the same that those applied in read opera-
tions, but are separately defined:
1. NCS_WR_SETUP: the NCS setup time is defined as the setup time of address before
the NCS falling edge.
2. NCS_WR_PULSE: the NCS pulse length is the time between NCS falling edge and
NCS rising edge;
3. NCS_WR_HOLD: the NCS hold time is defined as the hold time of address after the
NCS rising edge.
Figure 29-12. Write Cycle
A
[25:2]
NBS0, NBS1,
NBS2, NBS3,
A0, A1
NCS
NWE_SETUP NWE_PULSE NWE_HOLD
MCK
NWE
NCS_WR_SETUP
NCS_WR_PULSE
NCS_WR_HOLD
NWE_CYCLE