500
11054A–ATARM–27-Jul-11
SAM9X25
500
11054A–ATARM–27-Jul-11
SAM9X25
31.5
DMAC Software Requirements
• There must not be any write operation to Channel registers in an active channel after the
channel enable is made HIGH. If any channel parameters must be reprogrammed, this can
only be done after disabling the DMAC channel.
• When destination peripheral is defined as the flow controller, source single transfer request
are not serviced until Destination Peripheral has asserted its Last Transfer Flag.
• When Source Peripheral is flow controller, destination single transfer request are not serviced
until Source Peripheral has asserted its Last Transfer Flag.
• When destination peripheral is defined as the flow controller, if the destination width is
smaller than the source width, then a data loss may occur, and the loss is equal to Source
Single Transfer size in bytes- destination Single Transfer size in bytes.
• When a Memory to Peripheral transfer occurs if the destination peripheral is flow controller,
then a prefetch operation is performed. It means that data are extracted from memory before
any request from the peripheral is generated.
• You must program the DMAC_SADDRx and DMAC_DADDRx channel registers with a byte,
half-word and word aligned address depending on the source width and destination width.
• After the software disables a channel by writing into the channel disable register, it must re-
enable the channel only after it has polled a 0 in the corresponding channel enable status
register. This is because the current AHB Burst must terminate properly.
• If you program the BTSIZE field in the DMAC_CTRLA, as zero, and the DMAC is defined as
the flow controller, then the channel is automatically disabled.
• When hardware handshaking interface protocol is fully implemented, a peripheral is expected
to deassert any sreq or breq signals on receiving the ack signal irrespective of the request
the ack was asserted in response to.
• Multiple Transfers involving the same peripheral must not be programmed and enabled on
different channel, unless this peripheral integrates several hardware handshaking interface.
• When a Peripheral is flow controller, the targeted DMAC Channel must be enabled before the
Peripheral. If you do not ensure this the DMAC Channel might miss a Last Transfer Flag, if
the First DMAC request is also the last transfer.
• When AUTO Field is set to TRUE, then the BTSIZE Field is automatically reloaded from its
previous value. BTSIZE must be initialized to a non zero value if the first transfer is initiated
with AUTO field set to TRUE even if LLI mode is enabled because the LLI fetch operation will
not update this field.
Summary of Contents for SAM9X25
Page 26: ...26 11054A ATARM 27 Jul 11 SAM9X25...
Page 138: ...138 11054A ATARM 27 Jul 11 SAM9X25 138 11054A ATARM 27 Jul 11 SAM9X25...
Page 162: ...162 11054A ATARM 27 Jul 11 SAM9X25 162 11054A ATARM 27 Jul 11 SAM9X25...
Page 216: ...216 11054A ATARM 27 Jul 11 SAM9X25 216 11054A ATARM 27 Jul 11 SAM9X25...
Page 266: ...266 11054A ATARM 27 Jul 11 SAM9X25 266 11054A ATARM 27 Jul 11 SAM9X25...
Page 330: ...330 11054A ATARM 27 Jul 11 SAM9X25 330 11054A ATARM 27 Jul 11 SAM9X25...
Page 374: ...374 11054A ATARM 27 Jul 11 SAM9X25...
Page 468: ...468 11054A ATARM 27 Jul 11 SAM9X25 468 11054A ATARM 27 Jul 11 SAM9X25...
Page 532: ...532 11054A ATARM 27 Jul 11 SAM9X25 532 11054A ATARM 27 Jul 11 SAM9X25...
Page 692: ...692 11054A ATARM 27 Jul 11 SAM9X25 692 11054A ATARM 27 Jul 11 SAM9X25...
Page 777: ...777 11054A ATARM 27 Jul 11 SAM9X25 777 11054A ATARM 27 Jul 11 SAM9X25...
Page 886: ...886 11054A ATARM 27 Jul 11 SAM9X25 886 11054A ATARM 27 Jul 11 SAM9X25...
Page 962: ...962 11054A ATARM 27 Jul 11 SAM9X25 962 11054A ATARM 27 Jul 11 SAM9X25...
Page 1036: ...1036 11054A ATARM 27 Jul 11 SAM9X25 1036 11054A ATARM 27 Jul 11 SAM9X25...
Page 1128: ...1128 11054A ATARM 27 Jul 11 SAM9X25 1128 11054A ATARM 27 Jul 11 SAM9X25...
Page 1130: ...1130 11054A ATARM 27 Jul 11 SAM9X25...
Page 1132: ...1132 11054A ATARM 27 Jul 11 SAM9X25...
Page 1144: ...xii 11054A ATARM 27 Jul 11 SAM9X25...