633
11054A–ATARM–27-Jul-11
SAM9X25
34.13 Write Protection Registers
To prevent any single software error that may corrupt HSMCI behavior, the entire HSMCI
address space from address offset 0x000 to 0x00FC can be write-protected by setting the
WPEN bit in the
“HSMCI Write Protect Mode Register”
(HSMCI_WPMR).
If a write access to anywhere in the HSMCI address space from address offset 0x000 to 0x00FC
is detected, then the WPVS flag in the HSMCI Write Protect Status Register (HSMCI_WPSR) is
set and the field WPVSRC indicates in which register the write access has been attempted.
The WPVS flag is reset by writing the HSMCI Write Protect Mode Register (HSMCI_WPMR)
with the appropriate access key, WPKEY.
The protected registers are:
•
“HSMCI Mode Register” on page 636
•
“HSMCI Data Timeout Register” on page 638
•
“HSMCI SDCard/SDIO Register” on page 639
•
“HSMCI Completion Signal Timeout Register” on page 645
•
“HSMCI DMA Configuration Register” on page 658
•
Summary of Contents for SAM9X25
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