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Tektronix 318, Technical Manual

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TM 11-6625-3145-14

Theory of Operation-318/338 Service

QUALIFY LOGIC <5>
The qualify logic consists of A03U100, A03U114A, A03114B, A03U114C, A03U116A, A03U116B, A03U116C, A03U118A,
and A03U118B.  The qualifier signals QA, QB, QC, and QD from the A02 INPUT B board go to gate A03U100, where they
are converted into inverting and non-inverting signals.  The signals are wire-ANDed with the outputs of qualify registers
A03U106, A03U108, A03U102, and A03U104, and go to EXOR gates A03U114, A03U116, and A03U118 where their
polarities are selected according to the polarity selection bits of A03U102, A03U104, A03U106, and A03U108.  Each
output of the XOR gates is wire-ANDed to form the trigger and clock qualify signals.  These two signals go to gates
A03U126A and A03U126B <6> of the start logic.

START/STOP LOGIC <6>
The start/stop logic consists of A03U124B, A03U126A, and A03U126B.  When the data acquisition starts, a START1
pulse is generated at I/O address 56

hex 

and goes to the clock input of A03U 1 24B.

The output signal of this flip-flop enables the TRIG QUAL1 and CLOCK QUAL signals to pass through gates A03U126A
and A03U126B to the inputs of the trigger qualify and the clock qualify flip-flops.

START2 is issued at I/O address 55

hex

 to get the acquired data from the ACQ memory on the A04 board.  The MPU sets

the data by incrementing the address counter on the A04 board at I/O address 54

hex

.

At the end of the data acquisition, the STOP1 signal is issued by the output of the STOP flag.  At the end of the read from
ACQ memory operation, MANUAL STOP is generated at I/O address 53

hex

.

TRIGGER QUALIFY FLIP-FLOP <6>
The trigger qualify flip-flop consists of A03U128A.  The trigger qualify signal is clocked into the Dtype flip-flop every system
clock.

The output of the flip-flop connects to one of the retiming flip-flops through delay line A03DL106B.

RETIMING CLOCK <6>
The retiming clock circuit consists of A03U128B, A03C100, A03R136, A03DL102, A03U134B, and A03U142C <6>.  The
pulse generated by A03U128B, A03C100, and A03R136, called the retiming clock genarator, goes through delay line
A03DL102 to the clock pin of A03U134B.

The pulse delay time is adjusted by selecting a tap of J200.  The pulse is used as the retiming clock by which the trigger
data is latched into the retiming flip-flops.

CLOCK QUALIFY FLIP-FLOP <6> The clock qualify circuit consists of A03U130, A03DL100B, A03DL100A, A03U142D,
A03R130, and A03C1025.  The pulse generated by A03U130A and A03DL100B goes through A03DL100A and A03U142D
to the clock pins of A03U130B, A03U132A, and A03U132B as the trigger pulse for the strobe generators.

4-46

Summary of Contents for 318

Page 1: ...4 TECHNICAL MANUAL OPERATOR S ORGANIZATIONAL DIRECT SUPPORT AND GENERAL SUPPORT MAINTENANCE MANUAL LOGIC ANALYZER TEKTRONIX MODELS 318 338 H E A D Q U A R T E R S D E P A R T M E N T O F T H E A R M Y 12 SEPTEMBER 1985 ...

Page 2: ...ER IF YOU CANNOT TURN OFF THE ELECTRICAL POWER PULL PUSH OR LIFT THE PERSON TO SAFETY USING A DRY WOODEN POLE OR A DRY ROPE OR SOME OTHER INSULATING MATERIAL SEND FOR HELP AS SOON AS POSSIBLE AFTER THE INJURED PERSON IS FREE OF CONTACT WITH THE SOURCE OF ELECTRICAL SHOCK MOVE THE PERSON A SHORT DISTANCE AWAY AND IMMEDIATELY START ARTIFICIAL RESUSCITATION A 5 1 2 3 4 5 ...

Page 3: ...f this publication may not be reproduced in any form without the written permission of Tektronix Inc Products of Tektronix Inc and its subsidiaries are covered by U S and foreign patents and or pending patents TEKTRONIX TEK SCOPE MOBILE and are registered trademarks of Tektronix Inc TELEQUIPMENT is a registered trademark of Tektronix U K Limited Printed in U S A Specification and price change priv...

Page 4: ...ANUAL LOGIC ANALYZER TEKTRONIX MODELS 318 338 REPORTING ERRORS AND RECOMMENDING IMPROVEMENTS You can help improve this manual If you find any mistakes or if you know of a way to improve the procedures please let us know Mail your letter DA Form 2028 Recommended Change to Publications and Blank Forms or DA Form 2028 2 located in the back of this manual direct to Commander US Army Communications Ele...

Page 5: ...0 1 Scope 0 1 0 2 Consolidated Index of Army Publications and Blank Forms 0 1 0 3 Maintenance Forms Records and Reports 0 1 0 4 Reporting Equipment Improvement Recommendations EIR 0 1 0 5 Administrative Storage 0 1 0 6 Destruction of Army Electronics Material 0 1 ii ...

Page 6: ...r Service Manual This manual supports the following versions of this product All REV DATE DESCRIPTION JAN 1984 Original Issue NOV 1984 Revised Printing Pages X1 1 3 5 2 15 49 50 and 51 Tab Fig 4 Accessories page Fig 9 11 Electrical Parts List Diagrams 5 and 6 iii iv blank ...

Page 7: ...2 OPTIONS Section 3 OPERATING INSTRUCTIONS INTRODUCTION 3 1 INSTALLATION 3 1 Power Requirements 3 1 Power Cord 3 1 MENU CHARACTERISTICS 3 2 Power Up Configuration Display 3 2 Menus and Submenus 3 2 Menu Default Displays 3 2 Menu Fields and the Edit Cursor 3 2 Error Message and Acquisition Status Readout 3 3 Major Mode Selection Field 3 3 Inputs During Acquisition 3 3 MENU FUNCTIONS 3 3 Setup Menu ...

Page 8: ... 3 16 NVM Test 3 17 Section 4 THEORY OF OPERATION SECTION ORGANIZATION 4 1 DIGITAL LOGIC CONVENTIONS 4 1 GENERAL SYSTEM DESCRIPTION 4 1 Acquisition Module 4 2 Parallel Data Inputs A01 AND A02 4 2 P6451 Parallel Data Probe 4 2 P6107 External Clock Probe 4 2 Data Buffers Delay Lines and First Lactches 4 3 External Clock Circuit 4 3 Clock Selector 4 3 Word Recognizer 4 3 Threshold Circuit 4 3 Acquisi...

Page 9: ...DESCRIPTIONS FOR THE 318 4 5 318 A01 Input A Board 1 2 A02 Input B Board 3 4 4 5 Overview 4 5 Address Decoder 2 4 6 External Clock Input 4 4 6 External Clock Comparator 4 4 6 Clock Selector 4 4 6 Glitch Control 2 3 4 4 7 Pipeline Register 1 3 4 7 Word Recognizer 1 2 3 4 7 Data Threshold Buffer 4 4 7 Probe Compensation 4 4 8 318 A03 ACQ Control Board 5 6 7 4 8 I O Address Decoder 6 4 10 Qualify SQR...

Page 10: ... Counter and Carry Latch 4 18 Timebase and MPU Bus Interface 9 4 19 TTL to ECL Translator 4 19 Address Decoder 4 19 Oscillator 4 19 Divider Timer and Slow Clock Detector 4 19 INTCLK Buffer 4 19 Data Selector 4 19 ECL to TTL Translator and TTL Bus Buffer 4 19 Full Valid Flag Latch 4 20 LSI B A04U 140 4 20 318 338 A05 ROM Threshold Board 10 4 24 ROM Circuitry 4 24 Threshold Circuit 4 25 D A Converte...

Page 11: ...al Sweep Generator 4 36 Vertical Sweep Generator 4 37 318 338 A11 Power Supply 15 16 4 37 Line Input 15 4 37 Inverter Start Network 15 4 38 Inverter Control 16 4 39 Regulator 4 39 Dead Time Controller 4 39 Over Under Voltage Protection 16 4 39 Low Voltage Rectifiers and Regulators 16 4 39 12 Volt and 12 Volt Supplies 4 39 3 3 Volt Supply 4 39 5 Volt Supply 4 40 Fan Circuit and Fan 16 4 40 DETAILED...

Page 12: ...it 4 49 SQRAM Data Word Recognizer Data Multiplexer 7 4 49 LSI A A03U158 7 4 49 Address Decoder 4 50 N Register 4 50 DL Register 4 50 Mask Register 4 50 Event Delay Counter 4 50 ACQ Status Logic 4 50 338 A04 ACQ Memory Board 8 9 4 52 Acquisition Memory and ACQ Address Counter 8 4 52 Chip Select Latch 4 52 Acquisition Memory 4 52 ACQ Address Counter and Carry Latch 4 53 Timebase and MPU Bus Interfa...

Page 13: ... Analyzer 5 39 PERFORMANCE CHECK FOR THE 318 5 43 Index of Performance Checks 5 43 The Performance Checks 5 43 Test 1 Threshold Voltages 5 43 Test 2 Parallel Data Acquisition Word Recognition and Trigger Sequencer Check with External Clock Minimum Period 5 47 Test 3 Glitch Data Acquisition and Glitch Trigger 5 55 Test 4 Start Output and Trigger Output Test 5 58 Test 5 External Trigger Input Test 5...

Page 14: ...ECK FOR THE 338 5 98 Index of Performance Checks 5 98 Test 1 Threshold Voltages 5 99 Setup 5 99 Threshold Level TTL 5 101 Threshold Levels V1 V2 and V3 5 101 Test 2 Parallel Data Acquisition Word Recognition and Trigger Sequencer Checks with External Clock Minimum Period 5 102 Test 3 Glitch Data Acquisition and Glitch Trigger 5 111 Setup 5 112 Negative Glitch 5 114 Test 4 Start Output and Trigger ...

Page 15: ...oving the CRT Circuit Board 6 12 Removing the Cathode Ray Tube CRT 6 12 Section 7 MAINTENANCE TROUBLESHOOTING 318 DIAGNOSTIC TEST DESCRIPTIONS 7 1 Index of 318 Diagnostic Test Descriptions 7 1 318 Diagnostic Test Common Signal Paths 7 1 Mainframe 7 3 1 Keyboard Test 7 3 2 CRT Test 7 4 3 Jump Table ROM Test 7 6 4 Display RAM Test 7 7 5 System RAM Test 7 8 6 ROM Test 7 9 Parallel Analyzer 7 11 7 Clo...

Page 16: ...ecognizer Test 7 106 9 ACQ RAM Test 7 110 10 SQRAM Test 7 113 11 N DELAY Test 7 116 12 Threshold Test 7 119 13 SEQ Test 7 121 338S1 Serial Analysis RS232C NVM 7 122 14 Battery Test 7 122 15 Non Volatile Memory Test 7 122 16 RS 232 Test 7 123 17 Serial Test 7 124 Option I O Function List 7 126 338 TROUBLESHOOTING TREES 7 133 Section 8 REPLACEABLE ELECTRICAL PARTS 8 1 Section 9 DIAGRAMS 9 1 Section ...

Page 17: ...on volatile memory tests 3 17 4 1 318 Input A and Input B block diagram 4 8 4 2 318 Simplified diagram of the ACQ control circuitry on schematics 5 and 6 4 9 4 3 318 Simplified diagram of the ACQ control circuitry on schematic 7 4 10 4 4 318 SQRAM data register format 4 11 4 5 318 Qualify register format 4 11 4 6 318 Simplified diagram of the acquisition memory and ACQ address counter circuit 4 18...

Page 18: ...02 5 29 5 18 318 Test equipment setup for the clock delay adjustment 5 32 5 19 318 EXT CLK and DLD CLK signal adjustment locations 5 33 5 20 318 RET CLK WE ADRS CLK and TRIG CLK adjustments 5 38 5 21 318 Capacitor adjustment oscilloscope setup waveform 5 38 5 22 318 Capacitor adjustment waveform 5 38 5 23 318 Serial analysis RS 232C NVM test points and adjustment locations 5 39 5 24 318 Side view ...

Page 19: ...ta acquisition test setup 5 106 5 60 338 Parallel data acquisition test waveform 1 5 106 5 61 338 Parallel data acquisition test waveform 2 5 106 5 62 338 Glitch data acquisition test setup 5 112 5 63 338 Glitch data acquisition test waveform 1 5 113 5 64 338 Glitch data acquisition test waveform 2 5 114 5 65 338 Serial state analyzer performance test setup 5 117 6 1 Multi conductor terminal conne...

Page 20: ...nt 7 103 7 38 338 Clock test 7 105 7 39 338 Word recognizer test 7 109 7 40 338 ACQ memory test 7 112 7 41 338 SQRAM test 7 114 7 42 338 N and Delay counter test 7 118 7 43 338 Threshold test 7 119 7 44 Troubleshooting Tree 1 Power On 7 133 7 45 Troubleshooting Tree 2 Self Test 7 134 7 46 Troubleshooting Tree 3 Power Supplies A11 A12 7 135 7 47 Troubleshooting Tree 4 CRT A10 7 137 7 48 Troubleshoo...

Page 21: ...able Power Supply Tolerances 5 25 5 5 318 Clock Delay With Extender 5 37 5 6 318 Clock Delay Without Extender 5 37 5 7 318 Voltage Levels for Testing TTL 5 46 5 8 318 Voltage Levels for Testing V1 V2 and V3 5 46 5 9 318 Parallel Data Test Conditions and Expectations 5 51 5 10 318 Positive Glitch Pulse Generator Setup 5 57 5 11 318 Negative Glitch Pulse Generator Setup 5 58 5 12 318 Serial State An...

Page 22: ...Test Failure Codes 7 36 7 15 338 Diagnostic Test Common Signal Paths 7 94 7 16 338 Keyboard Test Key Code and Interrupt Assignment 7 95 7 17 338 ROM Test Address Assignment 7 101 7 18 338 Clock Test Program Ranges 7 106 7 19 338 Word Recognizer Test Port Addresses 7 107 7 20 338 ACQ Test Port Addresses 7 111 7 21 338 SQRAM Test Port Addresses 7 113 7 22 338 SQRAM Test SQRAM Data Connections 7 115 ...

Page 23: ...s that could result in damage to the equipment or other property WARNING statements identify conditions or practices that could result in personal injury or loss of life TERMS AS MARKED ON EQUIPMENT CAUTION indicates a personal injury hazard not immediately accessible as one reads the marking or a hazard to property including the equipment itself DANGER indicates a personal injury hazard immediate...

Page 24: ...ing knobs and controls that may appear to be insulating can render an electric shock USE THE PROPER POWER CORD Use only the power cord and connector specified for your product and be sure it is in good condition Refer to the Operating Information section of this manual for information on power cords and connectors USE THE PROPER FUSE To avoid fire hazard use only a fuse of the correct type voltage...

Page 25: ...charge the CRT by shorting the anode to chassis ground When discharging the CRT connect the discharge path to ground and then the anode Use extreme caution when handling the CRT Rough handling may cause it to implode Do not nick or scratch the glass or subject it to undue pressure during removal or installation When handling the CRT wear safety goggles and heavy gloves for protection REMOVE LOOSE ...

Page 26: ... SF 361 as prescribed in AR 55 38 NAVSUPINST 4610 33C AFR 75 18 MCO P4610 19D DLAR 4500 15 0 4 REPORTING EQUIPMENT IMPROVEMENT RECOMMENDATIONS EIR If your Logic Analyzer TEK Model 318 388 needs improvement let us know Send us an EIR You the user are the only one who can tell us what you don t like about your equipment Let us know why you don t like the design Put if on an SF 368 Quality Deficiency...

Page 27: ...tches are captured on eight channels Three word recognizers can be specified on all channels and used in several different triggering sequences The digital delay counts up to 65 000 clock cycles In the 318 data before or after the occurrence of a specified trigger sequence can be acquired and stored at sample intervals ranging from 20 ns to 500 ms with two lock and trigger qualifiers In the 338 da...

Page 28: ...232C interface and non volatile memory A standard 318 can be upgraded to 318S1 status by installing the 318F1 package 338S1 Logic Analyzer with serial analysis RS 232C interface and non volatile memory A standard 338 can be upgraded to 338S1 status by installing the 338F1 upgrade package 318F1 Package Optional field installable circuit board probe and connectors that upgrade the 318 Logic Analyzer...

Page 29: ...07 03 P6107 Probe 1 probe with 318 338 2 probes with 318S1 338S1 010 6451 07 P6451 Probe 2 probes with 318 4 probes with 338 161 0104 00 Power Cord Options A1 A5 Power Cords 318F1 338F1 Field installable upgrade package adds serial analysis RS 232C interface and non volatile memory to standard 318 338 Optional Accessories 070 4434 00 318 338 Logic Analyzer Service Manual 067 1159 00 Service Mainte...

Page 30: ...ble 1 1 318 338 ELECTRICAL SPECIFICATIONS Performance Supplemental Characteristics Requirements Information PARALLEL ANALYZER FUNCTION Data Input P6451 Probe See P6451 literature for more information Channels 318 16 channels Glitch data is detected on all 16 channels 338 32 channels Glitch data is detected on low order 8 channels Pod A Input R and C 1 MΩ 5 paralleled by approx 5 pF without leads M...

Page 31: ...10 MΩ_ 3 paralleled by approx 13 pF at 1 0 MΩ 5 paralleled by ap probe tip prox 20 pF at BNC Minimum logic swing 700 mV p p centered on threshold voltage Maximum logic swing 20 V peak Maximum non destructive 400 V peak at probe tip 40 V peak at BNC input connector Threshold Voltage Accuracy V1 0 1 V step variable 10V to 10V 0 23 V V2 0 1V step variable 10 V to 10 V 0 23 V V3 V1 V2 2 0 23 V TTL 1 4...

Page 32: ...gger Word trigger and glitch trigger are OR ed together Word recognizer Three Word A Word B and Wor d C Selected channels are AND ed together Input All data input channels from P6451 data acquisition probe Bit condition Logic 1 Logic 0 or X don t care selection Recognizer NXWA FLW D BY sequence THEN OR OFF WB FLW D BY THEN OR RESET ON OFF WC N number of WA events 65 000 max Glitch trigger Selected...

Page 33: ...tiated high when an internal trigger se quence glitch trigger or external trigger was detected Reset on next acquisition start Output level TTL 0 7 V or less for low level output Voltage maximum 6 V 2 4 V or more for high level output Current maximum High logic level 1 mA Low logic level 2 mA Typical propagation delay 60 ns after the trigger event is clocked and detected with internal clock 80 ns ...

Page 34: ... gether to qualify the trigger 318 338 Setup time 14 ns max 20 ns max Hold time 0 ns max 0 ns max Polarity Selectable HI or LOW Data Display Timing diagram mode Number of channels Maximum of 8 channels present on the screen at one time Window size 256 requires fuzz character 196 bits in mag 1 98 bits in mag 2 49 bits in mag 4 Channel ordering Channel reordering is specified on the timing data disp...

Page 35: ...current vertical Approx 300 mA p p horizontal Approx 1A p p Screen buffer memory size 1280 X 8 bits Screen format 32 characters row 20 rows screen Refresh rate 60 frames second interlaced Character generation character matrix 5 X 7 character 7 X 10 block character ROM size 2 K byte for parallel function 2 K byte for serial function Composite video output 525 line interlaced 60 Hz composite video V...

Page 36: ...aximum High logic level 0 5 mA Low logic level 2 mA Repetition rates C 10 µs G GND 0 20 µs 1 40 µs These test signals may be ac 2 80 µs cessed by P6451 data probe 3 160 µs P6107 external clock probe or 4 320 µs P6107 serial data probe 5 640 µs 6 1 28 ms 7 2 56 ms Start Output Generated when the instrument begins to acquire data Output level TTL level 0 7 V or less for low level output 2 4 V or mor...

Page 37: ...t Three terminal regulator 12 V Supply Regulation 1 V Ripple 50 mV p p Max rated current 0 07A Current limit point Three terminal regulator 5 V Supply Regulation 0 05 V max Ripple 50 mV p p max Max Rated current 1 5 A min 2 6 A max Current limit point 110 200 5 V Supply Regulation 0 05 V Ripple 50 mV p p max Max rated current 4 0A min 7 4 A max Current limit point 110 200 3 3 V Supply Regulation 0...

Page 38: ...0 V peak at BNC input connector Threshold voltage Voltage at probe tip Accuracy V1 0 1 V step variable 10 V to 10 V 0 23 V V2 0 1 V step variable 10 V to 10 V 0 23 V V3 V1 V2 2 0 23 V TTL 1 4 V 0 23 V One of four levels is selectable Sets threshold voltage at 0 V 3 V for measurement of RS 232C interface signal Sampling Clock source internal or external External clock input using P6107 probe the sa...

Page 39: ...op bit asynchronous Responds to one or more mode only Trigger output The trigger output is initiated high when the preset trigger words or external trigger was detected Reset on next acquisition start Data Display State Table mode Data format Hex Binary Octal ASCII EDCDIC radix Data table size 13 rows Parity error Parity error is indicated as up in the error display column adjacent to ASCII charac...

Page 40: ... ON or OFF Data transfer rate 110 150 300 600 1200 2400 4800 9600 Baud Signal characteristics Meets RS 232C standard I O connector 25 pin standard connector Pin 1 protective ground GND 2 transmitted data to DCE 3 received data from DCE 4 request to send to DCE 5 clear to send from DCE 6 data set ready from DCE 7 signal ground GND 8 received line signal detector from DCE 20 data terminal ready to D...

Page 41: ...mation NON VOLATILE MEMORY Option 01 Memory size 3 pages for setup parameters 1 page for 8 X 2048 bits ACQ or REF data Non volatile period Approx 5 years at room temperature Non volatile Memory control From keyboard or RS 232 bus Battery Lithium battery battery capacity 750 mAH or more Battery voltage check A check is performed of the battery at power up diagnostic 1 15 ...

Page 42: ...0 to 95 relative humidity Tested non operating at 600C and operating to meet MIL ST1 810C method 507 1 procedure 1 V modified as specified in MIL T 28800B paragraph 4 5 5 1 2 Vibration Operating A 15 minute sweep along each of 3 major axes at a total displacement of 0 025 inch p p 3 9 g s at 55 Hz with frequency varied from 10 Hz to 55 Hz to 10 Hz Hold 10 minutes at each major resonance or if no m...

Page 43: ...Characteristics Description Weight Net without accessories about 5 1 Kg about 12 lbs Dimensions Heights without accessory pouch 12 0 cm 4 7 in with accessory pouch 17 4 cm 6 8 in Width with handle 23 7 cm 9 3 in Depth handle not extended 40 9 cm 16 1 in Depth handle extended 49 2 cm 19 4 in 1 17 1 18 blank ...

Page 44: ...r to the Theory of Operation section 318F1 338F1 SERIAL ANALYSIS RS 232C INTERFACE AND NON VOLATILE MEMORY The Sony Tektronix 318F1 338F1 package is a field installable kit that upgrades the basic 318 338 Logic Analyzers to 318S1 338S1 status The package includes a circuit board Serial Data Probe and the necessary connectors to add the following features to the the basic 318 338 Serial state analy...

Page 45: ...tion for the voltage being supplied Adjust the red voltage selector switch on the back end panel of the instrument for the proper line voltage Make sure you are using the correct power supply cord when connecting the 318 338 If you are unsure if either the voltage selector switch is in the proper position or if you have the appropriate power cord refer the instrument to qualified service personnel...

Page 46: ...hen you enter the menu the menu and its default parameters appear on the screen This initial menu display is called the menu s default display If no changes are made to the menu s default display the 318 338 will use the default parameters during the various operations MENU FIELDS AND THE EDIT CURSOR When a menu is displayed on the 318 338 screen the menu s changeable parameters appear as reverse ...

Page 47: ...ity allows you to change the delay value or sample clock while looking at continuously acquired data without pressing the STOP key MENU FUNCTIONS SETUP MENU The Setup menu parallel serves two functions First it is used to specify the acquisition mode SINGLE REPEAT RPT UNTIL ACQ REF RPT UNTIL ACQ REF that will be used during acquisition The second function of the Setup menu is to determine the way ...

Page 48: ...y contents within the CMPR WDO window The channel organization of the parallel state display is controlled by the Setup menu TIMING DIAGRAM MENU PARALLEL ONLY The Timing Diagram menu parallel has two submenus SRCH search and T delta time The search function is the same as in the parallel State Table menu for displayed data or data on that page The T delta time function makes a timing measurement b...

Page 49: ...ay shows a configuration listing see 3 in Figure 3 1 At the top of the screen 1 in Figure 3 1 the message SELF TEST VERSION X X appears On the next line 2 in Figure 3 1 the message IN PROGRESS appears Each listed menu is tested and then given a PASS or FAIL notation See 4 in Figure 3 1 If errors are detected error messages also appear See 5 in Figure 3 1 PASS means that the test was successful FAI...

Page 50: ...turn to Diagnostics menu Press any MENU key to leave the Diagnostics menu and begin operation USER CHANGEABLE FIELDS FOR EACH TEST S DISPLAY LOOP and DISP display are the user changeable fields in each test except for the KBD CRT CLK T H and N DLY tests Some tests have more fields such as the ALL or SINGLE SELECTION field and the DATA ENTRY field Refer to Figures 3 4 and 3 5 while reading the foll...

Page 51: ...ECT When the field is set to I O the looping feature allows only I O instructions to be run repeatedly The I O address will appear on the screen When the field is set to ERROR the looping feature allows the tests in which an error is detected to be run repeatedly When the field is set to TEST the looping feature allows one test or sequence of tests to be run continuously When the field is set to O...

Page 52: ...ST will appear under tests instead of START TO BEGIN TEST Press X to return to the Diagnostics menu for all tests except KBD Press STOP to cancel tests For KBD test press STOP to cancel test and return to the Diagnostics menu DIAGNOSTIC TEST DESCRIPTIONS KBD Test To enter the keyboard test press 0 while in the Diagnostics menu The screen display simulates the keyboard When any key is pressed its p...

Page 53: ...TM 11 6625 3145 14 Operating Instructions 318 338 Service Figure 3 8 CRT test second display Figure 3 9 CRT test third display Figure 3 10 CRT test fourth display 3 9 ...

Page 54: ... value in this field by pressing INCR or DECR Press START and use the oscilloscope to verify the timebase value you have selected Nothing will appear on the screen WR Test To enter this test press 3 while in the Diagnostics menu This test is for the word recognizer RAM Refer to the Diagnostics menu or to the trouble shooting tree in Section 7 for details operation Press START to begin this test Th...

Page 55: ...l appear on the screen Error codes 30 31 32 33 Refer to Appendix B for details SQRAM Test To enter this test press 5 while in the Diagnostics menu This test is for the trigger sequencer RAM Refer to the Diagnostics menu or to the trouble shooting tree in Section 7 for details Figure 3 14 illustrates the SQRAM test operation Press START to begin this test The LOOP test and DISP ON OFF functions are...

Page 56: ...ter this test press 7 while in the Diagnostics menu This is an overall test for parallel acquisition components Refer to the Diagnostics menu or to the trouble shooting tree in Section 7 for details Figure 3 16 illustrates the SEQ test operation Press START to begin test The LOOP test and DISP ON OFF functions are available here The LOOP test has four features OFF I O ERROR and TEST These can be s...

Page 57: ... probe the signal with an oscilloscope to verify the threshold level To exit this test press the STOP key and then X External Clock Probe Compensation This test verifies that the External Clock Probe is properly compensated and provides a way to correct any misadjustment Note two nearly identical P6107 probes are supplied with the 318S1 338S1 one is called the External Clock Probe 20 pf compensati...

Page 58: ...status message When FIT appears on the screen the probe compensation is properly adjusted 20 pF The 318 338 will run continuously until STOP is pressed The other keys are disabled during probe compensation To exit this menu press STOP and then press X NOTE If your setup does not match Figure 3 18 your equipment setup may be incorrect Figure 3 19 Display for External Clock Probe compensation P6107 ...

Page 59: ...istance in ordering To begin this test press A while in the Diagnostics menu This test is for the SIO used in the serial data acquisition mode Refer to the Diagnostics menu or to the trouble shooting trees in Section 7 for details Figure 3 21 illustrates the serial SIO test operation Your probe connection setup should match that in Figure 3 20 before you begin this test To begin the test press STA...

Page 60: ...available here The LOOP test has four features OFF I O ERROR and TEST These can be selected by pressing SELECT even while the test is in progress DISP can also be selected during testing If DISP is OFF no results will appear on the screen other than results of the I O LOOP test To exit this test wait until the test is complete or press STOP and then press X If errors are detected and DISP is ON so...

Page 61: ...est The LOOP test and DISP ON OFF functions are available here The LOOP test has four features OFF I O ERROR and TEST These can be selected by pressing SELECT even during testing DISP can also be selected during testing If DISP is OFF no results will appear on the screen other than results of the I O LOOP test To exit this menu wait until the test is complete or press the STOP key and then press X...

Page 62: ...thin this instrument Function and operation of the logic circuits are represented by standard logic symbols and terms All logic functions are described using the positive logic convention Positive logic is a system of notation whereby the more positive of two levels is the true or 1 state and the more negative level is the false or 0 state In logic descriptions the more positive of the two logic v...

Page 63: ...r 338 to correspond to the circuit board assemblies used in the analyzer ACQUISITION MODULE PARALLEL DATA INPUTS A01 AND A02 The Input A A01 and Input B A02 boards configure the parallel data inputs These boards are mounted into connectors J1 and J2 respectively on the Mother board P6451 Parallel Data Probe In the 318 two P6451 parallel data probes can be connected to the right side panel The 338 ...

Page 64: ... and data writing All timing clocks are adjustable by tapped delay lines and variable capacitors This generator is enabled by the clock qualifier signal Trigger Sequencer The trigger sequencer performs complex triggering according to the data written in the Sequencer RAM SQRAM Three outputs from the word recognizers and the outputs from the glitch trigger are connected to the SQRAM inputs The trig...

Page 65: ...e video blinking other special display codes and letter codes by referring to the character ROM It then generates control signals for the CRT Bus Buffer All address buses and data buses are buffered to provide sufficient fan out to drive several boards connected to the bus through the Mother board Key Control Logic Key signals from the keyboard are encoded by a priority encoder and are sent to the...

Page 66: ... The SIO contains two serial data transceivers Port A and Port B Port A is used for serial data acquisition and Port B is for RS 232C control DETAILED CIRCUIT DESCRIPTIONS FOR THE 318 The following paragraphs contain theory of operation information for the 318 Logic Analyzer For information on the theory of operation for the 338 Logic Analyzer refer to the Table of Contents and following sections ...

Page 67: ...decodes 1 0 addresses 00 01 02 and 03 1 O address 00 A01U130 pin 11 is used to write trigger word data into the Word Recognizer memory from channel 0 to channel 15 I O address 01 A01U130 pin 10 is a clock selector port I O address 02 A01U130 pin 9 resets the word recognizer memory address counter This port also controls glitch trigger on and off I O address 03 A01U130 pin 7 increments the word rec...

Page 68: ...ee word recognizer functions where three different words may be set simultaneously They are named trigger words A B and C The MPU loads data into A01U120 1 and A02U220 3 according to the trigger word using A01 U124 2 A01 U126 2 A02U230 3 and A02U232 3 memory address counters The MPU increments these counters one by one and loads data for trigger word A B or C into A01 U120 and A02U220 Each WR RAM ...

Page 69: ... is the result of the clock signal compared with Threshold A 4434 580 Figure 4 1 318 Input A and Input B block diagram 318 A03 ACQ CONTROL BOARD 5 6 7 The A03 Acquisition Control board parallel data has two registers and memory that acquisition parameters are loaded into before data acquisition It also contains other circuitry that controls the trigger sequence and the acquisition memory Simplifie...

Page 70: ...TM 11 6625 3145 14 Theory of Operation 318 338 Service Figure 4 2 318 Simplified diagram of the ACQ control circuitry on schematics 5 and 6 4 9 ...

Page 71: ...e I O address decoder consists of A03U110 and A03U112 The circuit provides a single pulse used to activate a preselected device which then communicates with the MPU and controls the start logic and trigger sequencer circuits Device selection is made using the lowest three bits of the address bus during I O instruction execution on the ACQ Control board 4 10 ...

Page 72: ...8 at I O addresses 50hex and 51hex respectively The data format is illustrated in Figure 4 4 The outputs of A03U106 and A03U108 are connected to the SQRAM inputs The signal LDSQRAM A03U108 pin 14 is high when data is loaded from this data register into the SQRAM During an acquisition A03U106 and A03U108 are used as the qualify register Qualify data and other control bits are written to them at I O...

Page 73: ...hase the signal STOP1 A03U156A pin 2 is issued by the STOP flag output of A03U158 At the end of the read from ACQ memory operation MANUAL STOP is generated at 1 0 address 53hex TRIGGER QUALIFY FLIP FLOP 6 The trigger qualify flip flop circuit is A03U128A The TRIG QUAL signal is clocked into the D type flip flop from A03U126A every system clock cycle The output of A03U128A connects to one of the re...

Page 74: ...3C104 6 The trigger clock circuit consists of A03U130B A03DL104A A03DL104B A03U142A and A03U142B The pulse generated by the A03U130B and A03DL104B travels through A03DL104A to the trigger sequencer flags at A03U150 and A03U148 and LSI A 7 TRIGCLK1 goes to LSI A TRIGCLK2 goes to the trigger sequencer flags The trigger sequencer advances at the rate of the TRIG Clock as events are recognized NOTE Re...

Page 75: ...upplied by the MPU data The memory address is determined by the current status of the retiming flip flops The data from the SQRAM is applied to the trigger sequencer flags The data consists of four signals CE LOADL LOADDN and SUCCEED The signal CE enables the event delay counter in the LSI A The LOADN signal indicates that the contents of the N register which holds the N value in LSI A are loaded ...

Page 76: ...e trigger clock The TRIG D flag follows the SUCCEED flag when word C is acquired If the acquired data could not form a successful trigger sequence the LOADN signal is issued from A03U144 to reset the N flag and the SUCCEED flag STOP Flag Circuit The stop flag circuit consists of A03U154D A03U148A A03U122C A03U156A and A03U156D The stop flag is set after the delay counter in LSI A is counted out It...

Page 77: ...se signals except INT by issuing RDSTS at I O address 5Dhex INT is caused by any state change of any flag and each flag bit can be masked by the mask bit of the mask register The function of each signal in LSI A is shown in Table 4 1 Table 4 1 318 LSI A INPUT SIGNALS Signal Names Description EN Active low indicates that the MPU provides data on the data bus DO D7 to LSI A CSox Active low indicates...

Page 78: ...status signal and the flag is reset by RDSTS WAFLG Active low read as NFLAG by the MPU issuing RDSTS WAFLG is the output of the same latch which N is latched into by the RDSTS signal DTFLG Active high read as TRIG D FLAG by the MPU issuing RDSTS DTFLG is the output of the same latch which TRIG D is latched into by the RDSTS signal STFLG Active high read as STOP FLAG by the MPU issuing RDSTS STFLG ...

Page 79: ...ut prevents them from accepting new data Data in the RAMs can be sequentially read by incrementing the ACQ address counter after each read operation The outputs of the RAMs are connected to the data selector A04U142 and A04U144 9 ACQ Address Counter and Carry Latch The ACQ address counter designates the memory location of each data bit to be stored The counter consisting of A04U136 and A04U138 is ...

Page 80: ... sent to the INTCLK buffer A04U112D The INTCLK selection data is shown in Table 4 5 The timer generates the selected constant interval signal for an interrupt to the MPU This signal is reset by the RDSTS signal The slow clock detector circuit provides the capability to detect a slow sampling clock rate clock less than 25 ms in the external clock operation mode When the clock rate is slow the CLKSL...

Page 81: ...ce selector The timer circuit consists of an output latch which is reset by the RDSTS signal from the A03 ACQ Control board It generates a constant interval timing signal ranging from one to five multiples of the internally generated 100 ms clock The slow clock detector circuit consists of two shift registers and a control flip flop The CLKSLW signal is initialized to high level by the RDSTS signa...

Page 82: ...ompareo with gate clock in slow clock detector circuit RDSTS Read status for slow clock detector circuit operation trigger and timer output reset Table 4 4 318 LSI B A04U140 OUTPUT SIGNALS Signal Names Description INTCLK Selected internal clock 20 ns 500 ms 10USCLK 10 us period clock for the test output on the A01 Input A board CLKSLW Compared result of slow clock detector circuit This signal cond...

Page 83: ...1 1 0 500ns 0 1 1 0 0 0 1µs 0 1 1 0 0 1 2µs 0 1 1 0 1 0 5µs 0 1 0 1 0 0 10µs 0 1 0 1 0 1 20µs 0 1 0 1 1 0 50µs 0 1 0 0 0 0 100µs 0 1 0 0 0 1 200µs 0 1 0 0 1 0 500µs 0 0 1 1 0 0 1ms 0 0 1 1 0 1 2ms 0 0 1 1 1 0 5ms 0 0 1 0 0 0 100ms 0 0 1 0 0 1 20ms 0 0 1 0 1 0 50ms 0 0 0 1 0 0 100ms 0 0 0 1 0 1 200ms 0 0 0 1 1 0 500ms 0 X X X 1 1 by CPU 0 Low 1 High X Don t care A1 A0 of U140 set to be 00hex Disabl...

Page 84: ...TM 11 6625 3145 14 Theory of Operation 318 338 Service Figure 4 7 318 Simplified diagram of the timebase and MPU bus interface circuit 4 23 ...

Page 85: ... device communicates with the MPU This selection is determined by the output of the dual 2 line to 4 line decoders A05U1001 and A05U005 Gate A05U150D supplies the MERQ MEmory ReQuest signal for each fetch cycle The memory map is shown in Table 4 6 The I O map is shown in Table 4 7 A05U90 and A05U92 are used to decode the I O instructions on the A05 ROM Threshold board Table 4 6 MEMORY MAP Page Add...

Page 86: ...r The D A converter consists of A05U70 A05U75 A05U80 A05U85 and A05U130B A05U70 and A05U80 are D A converter ICs A05U75 and A05U85 are dual OP amplifiers which convert double eneded to single ended output A05U130B supplies a reference standard voltage source 3 2 V Analog Switches The analog switch consists of A05U100 A05U105 A05U110 A05U111 A05U112 A05U113 A05U114 A05U120 A05U125 and A05U130A A05U...

Page 87: ...TM 11 6625 3145 14 Theory of Operation 318 338 Service Figure 4 9 318 338 Simplified diagram of the ROM and threshold circuits 4 26 ...

Page 88: ...trol driver inverted These drivers send or receive the MPU signals to or from other boards KEYBOARD AND KEYBOARD CONTROLLER Control inputs from front panel keys except for the STOP key are encoded by A06U300 and A06U310 When a key is pressed X axis lines KBX0 KBX7 and Y axis lines KBY0 KBY7 supply a data matrix of the key pressed to A06U300 and A06U310 A06U301 encodes eight X axis lines to three b...

Page 89: ...ata from the display RAM while the display RAM address is accessed by the MPU Character latch A06U520 latches the 8 bit data read out from the display RAM The latched data is maintained for seven display clock cycles to achieve seven dots of display per character Data input to the character latch stage is provided and latched on the positive going edge of the character latch clock Character ROM A0...

Page 90: ...TM 11 6625 3145 14 Theory of Operation 318 338 Service Figure 4 10 318 338 Simplified diagram of the MPU Display board 4 29 ...

Page 91: ... clock voltage is higher than 1 25 V A07U111 will issue a TTL output at pin 7 NON VOLATILE MEMORY 17 The non volatile memory circuit provides battery backup operation for the non volatile memory It consists of the threshold voltage detector the chip select controller the battery switch the battery voltage checker and a random access memory Threshold Voltage Detector The threshold voltage detector ...

Page 92: ...A07U7 are connected to the battery power A07CR170 protects the battery from charging A07C160 adjusts the switching speed between two power sources Battery Voltage Checker The battery voltage checker circuit consists of A07Q170 and A07U32D A07Q170 compares the battery voltage supplied to its base with the voltage at its emitter 2 90V If the battery voltage is low 2 2V the input at pin 9 of U32 is h...

Page 93: ...ted I O Selector The I O selector A07U30 allows the MPU to address five I O devices A07U30 is enabled when the bus BM1 signal is false low the BWR or BRD signal is true low and I O addresses 80 through 93hex are selected The output of A07U30 is controlled by bus lines A4 A3 and A2 supplied to pins 3 2 and 1 respectively The functions and addresses of selected I O operations are shown in Table 4 9 ...

Page 94: ...form before it reaches the SIO When the SIO generates an interrupt it generates a low signal at pin 5 that ties to the bus INT line The SIO contains two serial data tranceivers PORT A receives data on pin 12 and a clock on pin 13 PORT B receives data on pin 28 and a clock on pin 27 PORT A is used for serial data acquisition and PORT B is used for RS 232 control The SIO contains two signal sets for...

Page 95: ...lock rate for A07U5 is the same as for A07U6 19 2K baud and external clock for RS 232 are not used Refer to Table 4 10 Level Converter The level converter stage consists of the RS 232 transmitter A07U41 and the RS 232 receiver A07U40 Transmitter A07U41 converts TTL level signals to RS 232 level and receiver A07U40 converts RS 232 level signals to TTL level RS 232 transmit signals TXD RTS DTR are c...

Page 96: ...e 1 4V at the base of A10Q110 and the inverted output from the collector of A10Q100 is supplied to the cathode of V200 The GLITCH signal at the base of A07Q120 switches the current of the differential amplifier A07Q100 and A07Q110 If the GLITCH signal is high A07Q120 is turned on When A07Q120 is on A07R110 and A07R124 are connected in parallel and the emitter current of A07Q100 increases A less po...

Page 97: ...t is generated by the combined operation of the horizontal amplifier damper and flyback transformer To clarify this circuit s operation a simplified diagram and associated waveforms are shown in Figure 4 13 The CHD CRT Horizontal Drive pulse is applied to the base of A10Q200 and the inverted CHD output is AC coupled to the base of A10Q220 Figure 4 13 318 338 Simplified diagram and waveform of the ...

Page 98: ...ertical deflection in yoke L150 The VD Vertical Drive signal s 0 572 ms pulse triggers this circuit every 16 6 ms IC A10U001 consists of a triggerable astable multivibrator sawtooth generator and output amplifier The astable multivibrator s time constant is determined by A10R002 A10R005 and A10C005 and locked by the VD pulse at 16 6 ms The output signal of the multivibrator generates a sawtooth si...

Page 99: ...eral minutes after the POWER switch is turned off Varistors A11VR101 and A11VR102 are surge voltage protectors If a peak voltage greater than 240 volts is present on the line A11VR101 and A11VR102 will conduct and quickly open line fuse F1 to interrupt the input power before the instrument can be damaged INVERTER START NETWORK 15 Capacitor A11C132 is charged by a constant current source made up of...

Page 100: ...ge During normal operation the voltage at pin 4 of A12U21 remains at about 1 5 volts If the Under Over Voltage Stop stage turns on A12U21 pin 4 voltage rises to about 5 volts and the inverter stops The inverter will remain off while A12C53 discharges through al 2Q58 keeping A12VR58 and A12Q59 turned off This cycle repeats until the fault is corrected with the inverter turned on for about 200 ms an...

Page 101: ...n the A02 Input B board 21 and their outputs are supplied to the first latches and glitch recognizers also in the M218s through delay lines Only data supplied by Pod A is processed through the glitch detection circuitry Data from Pods B C and D is routed to the data buffers on the A02 Input B board 22 and their output goes to the first latch through delay lines The word recognizers work with the l...

Page 102: ... enables the glitch trigger circuit GLITCH CONTROL CH 0 7 21 This circuit controls only the M218s 21 on the A02 board data from Pod A M218 s pin 15 controls the glitch output of Pin 14 Pin 14 issues a high level signal if a glitch is captured By setting pin 15 to high the output of pin 14 is disabled kept low if pin 15 is low an output on pin 14 is enabled Therefore if a glitch trigger on a certai...

Page 103: ...the other addresses Before an acquisition starts these WR address counter outputs are reset to 0 and the MPU changes 10016 s on the A01 board to latch mode and sets the output of M218s on the A02 board to on During an acquisition if the trigger word is latched the corresponding WR issues a 0 and that trigger line goes to 0 THRESHOLD BUFFER 22 The currents from the edge connecter 38B 39A 39B and 40...

Page 104: ...6 338 Simplified diagram of the ACQ control circuitry on schematics 5 and 6 Figure 4 17 shows the external and glitch trigger circuitry retiming flip flops address buffer SQRAM trigger sequencer circuit SQRAM Data Word recognizer data selection circuit and LSI A 4 43 ...

Page 105: ... The I O address decoder consists of A03U110 and A03U112 The circuit provides a single pulse which activates the specific devices that communicate with the MPU and that control the start logic and the trigger sequence circuitry This selection is made by the lowest three bits of the address bus during I O instruction execution to the ACQ control board 4 44 ...

Page 106: ...ts of A03U106 A03U108 A03U102 and A03U104 The MPU writes the qualify data into U106 at I O address 50hex U108 at I O address 51hex and into A03U102 and A03U104 at I O address 52hex The data format is illustrated in Figures 4 18 and 4 19 Figure 4 18 338 SQRAM data register format Figure 4 19 338 Qualify register format 4 45 ...

Page 107: ...s issued at I O address 55hex to get the acquired data from the ACQ memory on the A04 board The MPU sets the data by incrementing the address counter on the A04 board at I O address 54hex At the end of the data acquisition the STOP1 signal is issued by the output of the STOP flag At the end of the read from ACQ memory operation MANUAL STOP is generated at I O address 53hex TRIGGER QUALIFY FLIP FLO...

Page 108: ...ine the address for the ACQ memory on the A04 board In the data read mode the address clock is generated by STEP CLOCK The width of the address clock is determined by A03C104 The trigger clock circuit consists of A03U130B A03DL104A A03DL104B A03U124A and A03U142B 6 The pulse generated by A03U130B and A03DL104B goes through A03DL104A to the trigger sequencer flags at A03U148 and A03U150 and LSI A 7...

Page 109: ... sequencer table to the SQRAM the MPU writes the data already set in the data register A03U106 and A03U108 5 into the SQRAM at I O address 58hex The address to the SQRAM is supplied by the MPU data The memory address is determined by the current status of the retiming flip flops The data from SQRAM is applied to the trigger sequencer circuit The data consists of four signals CE LOADN LOADDN and SU...

Page 110: ... by C or WA then B then C or WA followed by B then C In this mode when word B arrives from the parallel data probes the SUCCEED signal from the SQRAM goes high and the SUCCEED flag is set at the rising edge of the trigger clock The TRIG D flag follows the SUCCEED flag when word C is acquired If the acquired data could not form a successful trigger sequence the LOADN signal is issued from A03U144 7...

Page 111: ...which generates the N 1 signal when it counts out ACQ Status Logic The ACQ status consists of four flags DTFLG WAFLG STFLG CRFLG and the INT signal The MPU gets these signals except for INT by issuing RDSTS at I O address 5Dhex INT is caused by any state change of any flag and each flag bit can be masked by the mask bit of the mask register The function of each signal in LSI A is shown in Table 4 ...

Page 112: ...t I O address 5Dhex by the MPU to request the status signals Table 4 12 LSI A OUTPUT SIGNALS Signal Names Description N 1 Active low generated as a carry bit when the event delay counter reaches full count INT Active low the output of the INT flag in LSI A The MPU receives INT when an interrupt in the ACQ status logic occurs INT is caused by any change in any status signal The INT flag is reset by...

Page 113: ...6 A04U118 A04U120 A04U122 A04U124 A04U126 A04U128 A04U130 A04U132 and A04U134 The ACQ memory location of each data bit to be stored is controlled by the address counter These memories operate in either write or read mode In the write mode the low level of the WE pulse applied to pin 8 of each RAM stores the input data in the location defined by the ACQ Address Counter During the write operation a ...

Page 114: ...ion is determined by outputs from the 3 line to 8 line decoder A04U110 Gate A04U112C supplies the I O enable signal EN which is an ORed signal of BRD and BWR Oscillator The oscillator circuit consists of A04U112A and A04U112B 9 A04U112A and crystal A04Y100 form a 100 MHz crystal controlled oscillator The 100 MHz oscillator is buffered by A04U112B before being divided by A04U140 LSI B Divider Timer...

Page 115: ...TM 11 6625 3145 14 Theory of Operation 318 338 Service Figure 4 21 338 Simplified diagram of the timebase and MPU bus interface circuit 4 54 ...

Page 116: ...e A03 ACQ Control board LSI B A04U140 The Sony Tektronix A04U140 is a hybrid chip that provides simplified circuit construction reduced circuit board space and lower power consumption Its circuitry consists of an address decoder divider timer and slow clock detector The address decoder circuit consists of four decoders that enable the MPU to select the sample interval gate clock interval timer clo...

Page 117: ...re the start of gate timing because the CLKSLW signal is changed by the gated SYSCLK The function of each signal in A04U140 is as follows Table 4 13 318 LSI B A04U140 INPUT SIGNALS Signal Names Description EN Generates data latch strobe The data latch state is changed by a low level pulse of this signal CS1X Chip select for A04U140 A1 A0 Address for data latch A1 MSB A0 LSB D5 D0 Data for internal...

Page 118: ... 500ns 0 1 1 0 0 0 1µs 0 1 1 0 0 1 2µs 0 1 1 0 1 0 5µs 0 1 0 1 0 0 10µs 0 1 0 1 0 1 20µs 0 1 0 1 1 0 50µs 0 1 0 0 0 0 100µs 0 1 0 0 0 1 200µs 0 1 0 0 1 0 500µs 0 0 1 1 0 0 1ms 0 0 1 1 0 1 2ms 0 0 1 1 1 0 5ms 0 0 1 0 0 0 10ms 0 0 1 0 0 1 20ms 0 0 1 0 1 0 50ms 0 0 0 1 0 100ms 0 0 0 1 0 1 200ms 0 0 0 1 1 0 500ms 0 X X X 1 1 by CPU 0 Low 1 High X Don t care Al A0 of A04U140 set to be 00hex Disable int...

Page 119: ...318 VERIFICATION AND ADJUSTMENT PROCEDURES ...

Page 120: ...in this manual after adjustment repair is necessary Performance Check Procedures These tests provide a detailed check of internal and external product characteristics All specifications listed in the performance requirements column of the specifications are verified These checks can be extensive and time consuming Under normal circumstances the functional check procedure provides an adequate test ...

Page 121: ...Fabricate the chassis a Using 50 mil aluminum cut and drill the chassis according to Figure 5 1 b Bend the chassis up to right angles at each bend line on the wide part of the chassis Do not make the final 3 8 inch bend on the tail end at this time Figure 5 1 Test Fixture construction diagram 2 Assemble the square pins a Cut two 11 pin lengths of right angle square pin terminals and two 11 pin len...

Page 122: ...from the BNC plug to the first set of four pins front end on the square pin assembly It is important that this connection be as short as practical to avoid high speed signal loss b Solder one end of the 50 ohm resistor to the scope probe connector s ground lug c Attach the scope probe connector and the BNC connector including ground lugs and attached square pin assembly to the chassis d Bend the t...

Page 123: ...ns of the 318 338 Logic Analyzer This information is presented here at the front of the section to prevent duplication throughout the following procedures SUGGESTED TEST INSTRUMENTS There are three procedures in this section the functional check the adjustments and the performance check The functional check uses the TEST OUTPUT signal which is delivered from the 318 338 right side panel no other i...

Page 124: ...imeter DMM 1 1 DM501 Regulated dc power supply 1 PS501 Serial data generator 1 834 Extender boards 2 Maintenance kit 067 1159 00 Ejector 2 BNC 50 Q 2 W termination 4 1 011 0049 01 1 MQ 40pF normalizer 1 067 0935 00 2 SQR pin to probe tip adapter 1 BNC T connector 3 1 103 0030 00 BNC elbow male to female adapter 3 103 0031 00 BNC female to female adapter 1 103 0029 00 BNC male to dual binder adapte...

Page 125: ...e for the 318 Logic Analyzer only The Functional Check for the 338 Logic Analyzer begins in the second half of this section refer to the margin tabs for help in locating the 338 procedures The Functional Check Procedure verifies that all major sections of the logic analyzer are operational These tests can be used to determine whether adjustment and or repair is necessary The procedures are organiz...

Page 126: ...checked with the diagnostic program O KBD To start this program turn on the power while pressing any numeric key until an error message appears on the CRT 2 When an error message appears press the START key The Diagnostics menu will be displayed on the screen Press 0 to run the KBD test Refer to Figure 5 4 3 Press each key individually and observe the CRT display to make sure the corresponding rec...

Page 127: ...est parallel acquisition Figure 5 8 318 CRT test serial acquisition character fonts character fonts 1 The CRT can be visually checked with the diagnostic program 1 CRT To start this diagnostic program turn on the power while pressing any numeric key until an error message is displayed on the CRT 2 When an error message is displayed press the START key When the Diagnostics menu is displayed on the ...

Page 128: ... connect them to the instrument ground 2 Press the THRESHOLD menu key normal operating mode Threshold Level TTL a Set INPUT Thresholds to TTL for for both Pod A and Pod B b Press the START key The trigger position indicated by T will be displayed on the screen The trigger position will be T 7W T 127W or T 247W depending on the trigger position setting in the Trigger menu begin center or end c Chec...

Page 129: ...r position setting in the Trigger menu g Check that all data acquired are l s Threshold Level V3 a Set Threshold LEVEL V1 to 2 0V and V2 to 1 5 V b Check that the Threshold LEVEL V3 is 0 25 V c Set both Pod A and Pod B equal to V3 d Press the START key The trigger position displayed on the screen will be T 7W T 127W or T 247W depending on the trigger position setting in the Trigger menu e Check th...

Page 130: ... Power up the 318 and connect the P6107 External Clock probe tip to TEST OUTPUT C on the right side pannel Refer to Figure 5 9 b Connect the data leads of the P6451 Parallel Data probe in Pod A to TEST OUTPUT as follows P6451 Channel TEST OUTPUT G G 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 Q Not Connected Figure 5 9 318 Parallel data acquisition check setup 5 11 ...

Page 131: ...ck that the data acquired for Pod A is a decrementing pattern from FFhex to 00hex starting at position 0 and that the Trigger Word indicated by T is 81hex at position 126 3 Pod B a Disconnect the 10 terminal plug from the probe head of the P6451 Parallel Data probe in Pod A b Push that 10 terminal plug into the socket on the probe head of the P6451 Parallel Data probe in Pod B c Set G1 to OFF and ...

Page 132: ...d Press the START key e Check that data acquired for Pod B are all FFhex 5 EXT TRIGGER Check a Refer to Figure 5 10 Connect the data leads of the P6451 Parallel Data probe in Pod A to TEST OUTPUT as follows P6451 Channel TEST OUTPUT G G 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 See Text Q Not Connected Figure 5 10 318 External trigger check setup b Connect TRIG INPUT on the right side panel to TEST OUTPUT 7 5...

Page 133: ...ed by T is 7F at position 0 with T 0 showing in the lower right corner of the display f Set EXT TRIG POL to g Press the START key h Check that all the data acquired for Pod A is a repetitive decrementing pattern from 7Fhex to 00hex and that the Trigger Word indicated by T is 7F at position 0 with T 0 showing in the lower right corner of the display 6 Trigger Qualifier Check a Refer to Figure 5 11 ...

Page 134: ...ver triggered f Press the STOP key g Connect the qualifier lead of the P6451 Parallel Data probe in Pod A to TEST OUTPUT 7 and the qualifier tip of the P6451 probe in Pod B to TEST OUTPUT 6 h Press the START key and wait for the acquisition to be completed i Check that the data acquired for Pod B is a repetitive decrementing pattern from 3Fhx to 00x starting at position 0 and that the Trigger Word...

Page 135: ...r check setup 7 Clock Qualifier Check Setup a Connect the data leads of the P6451 Parallel Data probe in Pod A to TEST OUTPUT as follows P6451 Channel TEST OUTPUT G G 0 Not Connected 1 1 2 2 3 3 4 4 5 5 6 6 7 7 Q 0 b Connect the qualifier lead of the P6451 Parallel Data probe in Pod A to TEST OUTPUT 0 5 16 ...

Page 136: ...data acquired for Pod A is a repetitive decrementing pattern from 7Fhex to 00hex starting at position 0 and that the Trigger Word indicated by T is 7Ehex at position 1 d Set QUALIFIER Pod A to CLK H e Press the START key and wait for the acquisition to be completed f Check that the data acquired for Pod A is a repetitive decrementing pattern from 7Fhex to 00hex starting at position 0 and that the ...

Page 137: ... decrementing pattern from 7Fhex to 00hex starting at position 0 and that the Trigger Word indicated by T is 7Ehex at position 1 CHECK 6 GLITCH DATA ACQUISITION WITH TEST OUTPUT 1 Glitch Data Acquisition a Connect the data leads of the P6451 Parallel Data probe in Pod A to TEST OUTPUT as follows P6451 Channel TEST OUTPUT G G 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 Q Not Connected b Set up the 318 as follo...

Page 138: ...completed f Check that all the data for Pod B is displayed in inverse video in the GLITCH SEARCH mode and that T 0 appears in the lower right corner of the screen g Repeat procedures e through f for channels B6 through B0 of the Pod B GLITCH Trigger Glitch Triggering must be checked one channel at a time for the test to be valid CHECK 7 SERIAL STATE ANALYZER CHECK FOR THE 318S1 1 Serial Data Acqui...

Page 139: ...the echo mode to remote c Set the POWER switch to ON and press the SETUP key after the diagnostic program has run d Set the source mode to RMT then press the EXECUTE key e Set the RS 232 baud rate to match that of the terminal f Press the START key g Key in the IDENT command from the terminal and wait for prompt h Key in the REF command from the terminal and wait for a prompt i Check that the refe...

Page 140: ...TM 11 6625 3145 14 Verification and Adjustment Procedures 318 338 Service Figure 5 13 318 Setup for RS 232C control 5 21 ...

Page 141: ...iven are for the instrument under test and do not include test equipment error EQUIPMENT REQUIRED The equipment listed at the beginning of this Adjustment and Verification Procedures section in Table 5 1 is necessary to complete all the adjustment procedures A partial list of equipment needed for each individual check and adjustment is also shown at the beginning of each procedure s major step The...

Page 142: ...yzer 4 Threshold Voltages on the A02 INPUT B Board 5 Probe Compensation for the P6107 External Clock Probe 6 EXT CLK T and EXT CLK Delay 7 DLD CLK Delay 8 RET CLK WE ADRS CLK and TRIG CLK Delay and Width Serial State Analyzer 318S1 9 Threshold Voltages on the A07 Board 10 Input Capacitance and Serial Data Probe Compensation 40 pf 11 Non volatile Memory Battery Backup Threshold MAINFRAME 1 Adjust P...

Page 143: ...l within the limits given in Table 5 3 g Move the DMM plus lead to each point shown in Table 5 4 Set the DMM range as required h Check that the DMM readings are within the limits given in Table 5 4 4434 584 Figure 5 14 318 Power supply adjustments Table 5 3 318 ADJUSTABLE POWER SUPPLY TOLERANCES Pin Voltage Voltage Limits Potentiometer each 5 V pin 4 95 V to 5 05 V R18 labeled 5 V 5 V pin 4 95 V t...

Page 144: ...e 5 15 Adjust INTENSITY control R245 on the A10 CRT board to midrange c Adjust INTENSITY LIMIT CRT BIAS R247 on the A10 CRT board for normal intensity d Press the start key to display a horizontal line e Loosen the setting screw of L150 yoke coil f Rotate the L150 so that the displayed white stripe is parallel to the bezel window g Tighten the setting screw of L150 h Adjust MAGNET on L150 on the C...

Page 145: ...05 ROM board 4 Adjust VA O VOLT ADJ R078 on the A05 ROM board for a DMM indication of 0 000 0 010 V 5 Press the STOP key 6 Set Threshold LEVEL V1 to 10 0 V 7 Press the START key 8 Check that the DMM reading is 2 500 0 010 V 9 Press the STOP key 10 Set Threshold LEVEL V1 to 10 0 V 11 Press the START key 12 Check that the DMM reading is 2 500 0 010V 13 Press the STOP key c Threshold VB O VOLT Adjust...

Page 146: ... Digital Multimeter DMM 1 Oscilloscope Refer to Figure 5 17 A EXT CLK Threshold Adjustment 1 Setup a Connect the oscilloscope channel 1 probe tip to TP108 on the A01 INPUT A board b Set the oscilloscope triggering source to channel 1 and the sweep rate to 1 us div c Enter the Threshold menu and set EXT CLK input to V1 d Set CLK to EXT e Select the TRIGGER Menu and set the events field 00000 WA OFF...

Page 147: ...ads to the power supply terminals low to common high to d Adjust the regulated dc power supply output voltage to 10 00 V e Set Threshold LEVEL V1 to 10 0 V f Press the START key g Turn EXT CLK DC GAIN R239 on the A02 INPUT B board to the counterclockwise end h Turn R239 clockwise slowly while observing the oscilloscope waveform and mark the point where the waveform moves from stationary low level ...

Page 148: ...308 to the center position between the points marked by procedures d and f h Press the STOP key 3 Pod B a Connect the oscilloscope channel 1 probe lead to TP208 on the A02 INPUT B board b Press the START key c Turn POD B Threshold DC BALANCE R302 on the A02 INPUT B board to the counter clockwise end d Turn R302 clockwise slowly while observing the oscilloscope waveform and mark the point where the...

Page 149: ...obe will be the External Clock Probe and adjust the compensation accordingly Probes supplied from the factory are compensated to 40 pF The P6107 Serial Data Acquisition Probe has been factory compensated 40 pF and sealed with a CALIB sticker Recompensation must be performed by qualified service personnel only It is not necessary to compensate this probe We recommend that you install the colored ma...

Page 150: ...h 10X probe Position 0 v 2 4 divisions above midscreen 1 4 V at midscreen 7B85 Slope Triggering Mode Coupling Source Auto AC INT Magnification 1 X Hold Off at minimum B Delay Mode B Starts after DLY Time DIV 50 ns 5 ns with magnifiction Trace Sep On minimum Time zero 7B80 slope Triggering Mode Coupling Source Auto AC INT Position rising edge at center screen Hold Off at minimum Time Div 10 ns 1 ns...

Page 151: ...nnel 2 waveform within one graticule division of the rising edge of the channel 1 waveform 6 Press the STOP key C EXT 1 Set CLK to EXT 2 Press the START key 3 Turn DELAY TIME of the A timebase to place the falling edge of the channel 1 waveform on the center graticule 4 Turn TIME clockwise to obtain a reading of 25 00 0 1 ns 5 Adjust EXT DELAY P202 14 to 24 on the A02 INPUT B board to place the ri...

Page 152: ...NC T connector 2 BNC male to Probe tip Adapters 1 2 SQR pin to Probe tip Adapter Refer to Figures 5 18 and 5 19 a Install the 7B85 plug in module into the 7904 A timebase and install the 7B80 module into the B timebase b Connect a 50 Ω terminator to the pulse generator OUTPUT Connect a BNC T connector to the 50 Ω terminator Connect the oscilloscope channel 1 probe lead to one side of the BNC T con...

Page 153: ... as follows Termination BACK TERM pull switch out Period 0 1 µs Duration 10 ns 5 ns X 2 High level 0 35 V Low level 0 35 V f Select the A timebase and place the rising edge of the channel 1 waveform on the center graticule on the oscilloscope screen g Select the B timebase h Turn DELAY TIME of the A timebase to place the rising edge of the channel 1 waveform on the center graticule i Connect the o...

Page 154: ...nnect the oscilloscope channel 1 probe tip to one side of the BNC T connector 3 Connect the P6107 External Clock probe tip to the other side of the BNC T connector 4 Setup the oscilloscope as follows Mainframe Horizontal Mode B 7A26 Position Rising edge at center screen Channel 1 VOLTS DIV 20 mv 200 mv with 10 OX probe Trigger Source CH 1 Display Mode ALT Position 0 v at mid screen Channel 2 VOLTS...

Page 155: ...6 Select the Threshold menu and set INPUT EXT CLK V3 0 00 V 7 Set CLK to EXTT 8 Select the Trigger menu and set the Events field to 00000 WA OFF WB OFF WC This will cause the 318 to acquire data without triggering 9 Press the START key 10 Repeat the following procedures 11 through 13 to adjust each clock delay with Extender boards shown in Table 5 5 11 Connect the oscilloscope channel 2 probe tip ...

Page 156: ...t each clock delay and or width shown in Table 5 6 6 Connect the oscilloscope channel 2 probe tip to the corresponding test point given in Table 5 6 7 Turn TIME clockwise to display the clock delay value given in Table 5 6 8 Adjust the corresponding capacitor to place the rising or falling edge indicated by or in Table 5 6 of the channel 2 waveform within one graticule division of the rising edge ...

Page 157: ...res 318 338 Service Figure 5 20 318 RET CLK WE ADRS CLK and TRIG CLK adjustments Figure 5 20 318 RET CLK WE ADRS CLK and TRIG CLK adjustment Figure 5 21 318 Capacitor adjustment oscilloscope Figure 5 22 318 Capacitor adjustment waveform setup waveform 5 38 ...

Page 158: ...T DATA V1 f Press the START key g Record the voltage and label it V0 V0 will be used as a reference later h Connect the P6107 Serial Data probe tip to TP200 on the A07 board i Move the DMM plus lead to TP10 on the A07 board j Adjust R23 DC BALANCE on the A07 board for a DMM indication of V0 0 001 V the voltage measured in step 7 0 001 V k Press the STOP key I Set INPUT DATA V2 m Press the START ke...

Page 159: ... 50 Ω Cable Refer to Figures 5 25 and 5 26 a Connect the 40 pF normalizer to the SERIAL DATA INPUT jack on the left side panel Install a BNC T connector to the 40 pF normalizer Connect a 50 Ω cable from the pulse generator s OUTPUT to one side of the BNC T connector b Connect the oscilloscope channel 2 probe tip to the other side of the BNC T connector c Connect the osilloscope channel 1 probe tip...

Page 160: ...just P6107 Probe compensation screw so that the waveform corners are square p Reinstall the CALIB SEAL q Disconnect the test probes 11 Adjust Non volatile Memory Battery Backup Threshold Equipment Required 1 Oscilloscope 1 Digital Multimeter DMM Refer to Figures 5 16 and 5 17 a Connect the DMM minus lead to TP200 GND on the A07 board b Connect the DMM plus lead to TP101 5 V on the A07 board c Reco...

Page 161: ...TM 11 6625 3145 14 Verification and Adjustment Procedures 318 338 Service Figure 5 25 318 Input capacitance adjustment setup Figure 5 26 318 Input capacitance waveform 5 42 ...

Page 162: ...arallel Data Acquisition Word Recognition and Trigger Sequencer Checks with External Clock Minimum Period Test 3 Glitch Data Acquisition and Glitch Trigger Test 4 Start Output and Trigger Output Test 5 External Trigger Input Test 6 Serial State Analyzer 318S1 THE PERFORMANCE CHECKS Test 1 Threshold Voltages Tektronix Equipment Required Equivalent 1 Oscilloscope module 7904 with 7B80 and 7A26 plug ...

Page 163: ...rator OUTPUT Connect the P6107 External Clock probe tip to one side of the BNC T connector Refer to Figure 5 27 4434 514 Figure 5 27 Threshold voltage check setup b Connect the Test Scope Channel 1 10X Probe tip to the other side of the BNC T connector c Set the pulse generator as follows PERIOD 30ms DURATION SQ Wave d Connect the DMM minus lead to the power supply reference terminal and the plus ...

Page 164: ...n in Table 5 7 b Set the pulse generator output level to that given in Table 5 7 as measured by the oscilloscope Set the oscilloscope so that 1 4 V is at midscreen 1 Set the DVM for 1 40 V 2 Momentarily move the oscilloscope CH1 probe to the DVM 1 40 V output 3 Set the oscilloscope vertical Volts DIV so that the screen reads 200 mV 20 mV setting using 10x probe 4 Adjust the vertical position so th...

Page 165: ...en in Table 5 8 f Set the 318 SRCH WORD to equal the Expected Data and then check that the quantity of SRCH words equals 256 g Repeat Steps a to f for each test in Table 5 8 h Disconnect the test setup Table 5 8 318 VOLTAGE LEVELS FOR TESTING V1 V2 AND V3 Power T H Test Supply Pulse Generator T H Level Input Expected Output V High V Low V V1 V V2 V V3 V Clk A B Data 1 5 25 5 25 4 75 5 0 V1 all Fs ...

Page 166: ...tor s OUTPUT Connect a BNC T connector to the 50 Qt terminator Connect the P6107 EXT CLOCK probe tip to one side of the BNC T connector 2 Connect the oscilloscope channel 1 10X probe tip to the other side of the BNC T connector 3 Connect a BNC elbow to the Digital Delay s EVENTS INPUT Connect a BNC T connector to the elbow Connect one side of the T connector to the 1 pulse generator s TRIG OUT usi...

Page 167: ... 7 Set the Digital Delay s EVENT DELAY COUNT to 00001 and adjust the EVENTS and START LEVEL until triggered 8 Connect oscilloscope channel 2 to the 2 pulse generator s OUTPUT using 10X probe and the probe tip connector on the Test Fixture 9 Power up and setup the 318 as shown SETUP MENU PLR GROUP G1 ON AAAAAAAA 76543210 G2 OFF THRESHOLD MENU LEVEL V1 10 0V V2 10 0V INPUT EXT CLK V3 POD A V3 POD B ...

Page 168: ...robe Position 0 V at mid screen 7M80 Triggering Mode Coupling Source Auto AC INT Time DIV 5 ns 50 ns with magnification 11 Set the Pulse Generators shown Pulse Generator Setup 1 2 NORM CPMPLEMENT COMPLEMENT NORM BACK TERM OUIT pull OUT pull PERIOD 20 ns at 0 V level EXT TRIG DURATION 10 ns at 0 V level 14 ns pulse at 0 V level HIGH LEVEL 0 35V 0 25 LOW LEVEL 0 35 0 25 12 Set the oscilloscope trigg...

Page 169: ...layed 16 Press the START key 17 Check that the data acquired is equal to the Expected Data in Table 5 9 18 Setup the 318 CLK and QUALIFIERS for Conditions 2 and 3 in Table 5 9 Repeat steps 15 to 17for each Condition 19 Set the 1 pulse generator s OUTPUT to NORM 20 Adjust DD501 EVENTS LEVEL until the channel 2 waveform s falling edge crosses channel 1 s falling edge at 0 V mid screen See Figure 5 3...

Page 170: ...hould now be connected to the test fixture 23 Select the SETUP menu and set GROUP G1 B7 BO 24 Swap the Qualifier values for A and B in Table 5 9 and repeat steps 11 through 21 25 Return the 1 pulse generator s OUTPUT to COMPLEMENT 26 Adjust the DD501 events level slowly until the channel 2 waveform s falling edge crosses the channel 1 waveform s rising edge at 0 V mid screen See Figure 5 29 14 ns ...

Page 171: ...ata 1 or FF 2 00 3 FF 4 00 T 5 FF Trigger location 36 Press the STOP key and then the TRIGGER key 37 Change the TRIGGER MENU Word B to WB 00 38 Press the START key and check that the 318 does not trigger 39 Press the STOP key 40 Change the TRIGGER MENU as follows EVENTS 00001 WA FLW D BY WB FLW D BY WC 41 Press the DATA key and then the START key 42 Check for the following data and proper trigger ...

Page 172: ...and proper trigger location 243 Always no data 244 Always no data 245 Always no data 246 Always no data 247 Always no data 248 Always no data 249 or 00 T 250 FF Trigger location 54 Press the STOP key and the the TRIGGER key 55 Increase the DD501 DELAY COUNT by steps of 01000 until the oscilloscope display starts to become too dim to observe 56 Adjust the oscilloscope horizontal POSITION to display...

Page 173: ... 00 245 00 246 00 247 00 248 00 249 00 T 250 00 Trigger location 251 FF 252 00 66 Press the STOP key and then the scroll key 67 Return the DD501 DELAY COUNT to 00001 68 Adjust the DD501 EVENTS LEVEL slowly until the channel 2 waveform s falling edge crosses the channel 1 waveform s rising edge at 0 V mid screen See Figure 5 29 14 nS setup 0 nS hold 69 Disconnect the P6451 probe from the Pod A PARA...

Page 174: ...nect the oscilloscope s channel 1 10X Probe tip to the other side of the BNC T connector c Connect the 1 pulse generator s TRIG OUT to the 2 pulse generator s TRIG INPUT using the 42 inch long BNC cable d Connect all the Pod A P6451 Probe Data leads to the Test Fixture square pins and then connect the Test Fixture to the 2 pulse generator s OUTPUT Make sure that the P6451 Probe GND lead is connect...

Page 175: ...ervice Figure 5 31 318 Glitch data acquisition test setup TRIGGER MENU CLK EXT TRIG IMMEDIATELY Events 00000 WA OFF WB OFF WC GLITCH 76543210 POD A ON POD B ON QUALIFIERS POD A OFF B OFF 2 Positive Glitch a Set the Pulse Generator as per Table 5 10 and Figure 5 32 5 56 ...

Page 176: ...eadjustment Figure 5 32 318 Glitch data acquisition Figure 5 33 318 Glitch data acquisition test waveform 1 test waveform 2 NOTE Insure that the Glitch waveform timing does not occur 0 14 ns prior to the clock waveform s rising edge or the Glitch may appear as data in this test Glitch data width must be at least 5 ns as measured at 350 mv above threshold b Press the 318 DATA key until the State Ta...

Page 177: ... react and require readjustment b Follow the same procedure as in the POSITIVE GLITCH test select the State Table press the START key check for Glitch Data select the next channel and repeat until all channels have been tested c Move the P6451 Probe back to the Pod A INPUT setup the 318 for G1 A7 AO and repeat step b for Pod A Table 5 11 318 NEGATIVE GLITCH PULSE GENERATOR SETUP Pulse Generator 1 ...

Page 178: ...heck for the following display SRCH 1 34 Approximately WORD 01 01 G1 G2 H H 0 Always no data 1 Always no data 2 Always no data 3 Always no data 4 Always no data 5 Always no data 6 Always no data T 7 00 00 Trigger location 8 0X 0X X Don t care and it may 9 0X 0X change with each acquisition 10 01 01 Start Output 11 01 01 12 01 01 7 Move the mini jack cable from START OUTPUT to TRIG OUTPUT 8 Press t...

Page 179: ...e tip adapter from the pulse generator 6 Connect the BNC to mini jack Cable from the 50 ohm terminator at the PG502 OUTPUT to the 318 TRIG INPUT mini jack Connect the cable braid lead to the 318 GND mini jack 7 Power up and setup the 318 as follows TRIGGER MENU SOURCE EXT TRIG EXT TRIG POL 8 Press the START key and check that the 318 triggers 9 Set the pulse generator Period to EXT TRIG and insure...

Page 180: ...h to ON 2 Set major mode to SERIAL and press the EXECUTE key 3 Select the SETUP MENU and set the baud rate to 2400 4 Select the Threshold menu and set DATA and EXT CLK Threshold to 0 00 V 5 Allow 15 minutes for the 318 to stabilize 6 Connect test setup as shown in Figure 5 25 7 Set the serial data generator power to ON and select DTE SIMULATE mode 5 61 ...

Page 181: ...et the 318 baud rate to 19 2K DATA screen 16 Set the serial data generator baud rate to 19 2K 17 Set the 318 and the serial data generator controls as indicated in step 1 of Table 5 12 and repeat preceding steps of Test 6 11 through 14 18 Finish steps 2 through 7 Table 5 12 as set up in step 17 of Test 6 TABLE 5 12 318 SERIAL STATE ANALYZER TEST STEPS Serial Data Step 318 Generator Word Sequence 1...

Page 182: ...338 VERIFICATION AND ADJUSTMENT PROCEDURES ...

Page 183: ...g procedures are for the 338 Logic Analyzer only The Functional Check for the 318 Logic Analyzer begins in the first half of this section refer to the margin tabs for help in locating the 318 procedures The Functional Check Procedure verifies that all major sections of the instrument being checked are operational These tests can be used to determine whether adjustment and or repair is necessary Th...

Page 184: ...Figure 5 36 3 Press each key individually and observe the CRT display to make sure the corresponding rectangle blinks Press the STOP key last The keyboard generates an interrupt and corresponding key code for the MPU when any key except the STOP key is pressed The MPU reads the key code upon receiving the interrupt from the keyboard and blinks the corresponding rectangle in the key array displayed...

Page 185: ... Analyzer mode Figure 5 39 Used to check the CRT circuit and the CROM for parallel analyzer operations All character fonts for Serial Analyzer mode Figure 5 40 Used to check the CRT circuit and the CROM for serial analyzer operations 3 Press the X key to return to the Diagnostic menu 4433 08 4433 09 Figure 5 37 338 CRT test cross hatch pattern Figure 5 38 338 CRT test white pattern 4433 10 4433 11...

Page 186: ...ey The trigger position displayed on the screen will be T 7W T 127W or T 247W depending on the trigger position setting in the Trigger menu d Check that all data acquired are O s e Set Threshold LEVEL V1 to 0 3 V f Press the START key The trigger position displayed on the screen will be T 7W T 127W or T 247W depending on the trigger position setting in the Trigger menu g Check that all data acquir...

Page 187: ...hold LEVEL V3 is 0 25 V h Press the START key The trigger position displayed on the screen will be T 7W T 127W or T 247W depending on the trigger position setting in the Trigger menu i Check that all data acquired are l s CHECK 5 PARALLEL ANALYZER CHECK WITH TEST OUTPUT 1 Parallel Data Acquisition a Power up the 338 and connect the P6107 External Clock probe tip to TEST OUTPUT C on the right side ...

Page 188: ...ger word indicated by T is 81hex at position 126 g Disconnect the 10 terminal plug from the probe head of the P6451 Parallel Data probe in Pod A leave the 10 terminal plug connected at TEST OUTPUT h Push the 10 terminal plug into the socket on the probe head of the P6451 Parallel Data probe in Pod B Select the SETUP Menu and set GROUP G1 B B B B B B B B 7 6 5 4 3 2 1 0 Repeat steps e and f for Pod...

Page 189: ...00 words of 81 he starting at position 0 and that the rest of the words are all 80hex 3 EXT TRIGGER Check a Refer to Figure 5 42 Power up the 338 and connect the data leads of the P6451 Parallel Data probe in Pod A to TEST OUTPUT as follows P6451 Channel TEST OUTPUT G G 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 Not Connected Q Not Connected b Connect TRIG INPUT on the right side panel to TEST OUTPUT 7 A secon...

Page 190: ... d Press the START key e Check that all data acquired for Pod A is a repetitive decrementing pattern from 7Fhex to 00hex and that the trigger word indicated by T is 7F at position 0 with T 0 showing in the lower right corner in the display f Set EXT TRIG POL to g Press the START key h Check that all data acquired for Pod A is a repetitive decrementing pattern from 7Fhex to 00hex and that the trigg...

Page 191: ...nnect the data leads of the P6451 Parallel Data probe in Pod B to TEST OUTPUT as follows P6451 Channel TEST OUTPUT G G 0 0 1 1 2 2 3 3 4 4 5 5 6 Not Connected 7 Not Connected Q Not Connected b Ground all the qualifier and GND leads of the P6451 Parallel Data probes in all Pods Pods A through D c Setup the 338 as follows SETUP MENU PLR GROUP G1 OFF G2 ON BBBBBBBB 76543210 G3 OFF G4 OFF 5 71 ...

Page 192: ...ns 4 and 5 g Connect the qualifier leads of the P6451 Parallel Data probe to Pods A through D as follows Qualifier tip of P6541 in Pod TEST OUTPUT A 7 B 6 C 5 D 4 h Press the START key and wait for the acquisition to be completed i Check that the data acquired for Pod B is a repetitive decrementing pattern from Fhex to 0hex starting at position 0 and that the trigger word indicated by T is 02hex a...

Page 193: ... 5 Clock Qualifier Check a Power up the 338 and connect the data leads of the P6451 Parallel Data probe in Pod A to TEST OUTPUT as follows P6451 Channel TEST OUTPUT G G 0 Not Connected 1 1 2 2 3 3 4 4 5 5 6 6 7 7 Q 0 b Set up the 338 as follows SETUP MENU PLR GROUP G1 ON AAAAAAA A0 off 7654321 G2 OFF G3 OFF G4 OFF 5 73 ...

Page 194: ... at position 0 and that the trigger word indicated by T is 7Ehex at position 1 h Disconnect the 10 terminal plug from the probe head of the P6451 Parallel Data probe in Pod A Connect the 10 terminal plug into the socket of the Pod B probe head Select the SETUP Menu and set GROUP G1 B B B B B B B B 7 6 5 4 3 2 1 0 i Disconnect the 10 terminal plug from the probe head of the P6451 Parallel Data prob...

Page 195: ...g indicated by T 0 is showing in the lower right corner of the screen 5 Repeat steps 3 through 4 for glitch triggers A6 through A0 Glitch triggering must be checked one channel at a time for the test to be valid CHECK 7 SERIAL STATE ANALYZER CHECK FOR THE 338S1 1 Serial Data Acquisition and RS 232C Control a Connect test setup as shown in Figure 5 44 b Set terminal character format to 8 bits per c...

Page 196: ...y even Set the echo mode to remote c Set the POWER switch to ON and press the SETUP key after the diagnostics program has run d Set the source mode to RMT and press the EXECUTE key e Set the RS 232 baud rate to match that of the terminal f Press the START key g Key in the IDENT command from the terminal and wait for a prompt h Key in the REF command from the terminal and wait for a prompt i Check ...

Page 197: ...ting 318 information This section contains procedures for adjusting instrument variables so that the instrument meets or exceeds performance specifications If the instrument does not meet or exceed specifications after these procedures have been followed repair is necessary IMPORTANT PLEASE READ BEFORE USING THIS PROCEDURE PURPOSE The Adjustment Procedure provides a sequence for adjustments It is ...

Page 198: ... this manual Refer to the manual for the specific piece of test equipment you are using if more information is required EQUIPMENT ALTERNATIVES When equipment other than recommended test equipment is substituted control settings or adjustment setups may need to be altered If the exact equipment listed in Table 5 1 is not available check the Minimum Specification column in Table 5 2 carefully to see...

Page 199: ... are connected properly 1 Refer to Figure 5 46 Remove the 338 wraparound cover 2 Install P6451 Parallel Data Probes into each of the four PARALLEL DATA INPUT sockets on the right side panel 3 Set the DMM to measure dc voltage 4 Connect the DMM minus lead to J1 pin 9 GND on the A12 Regulator board located at the bottom rear of the 338 5 Connect the DMM plus lead to each point starting at 5 V shown ...

Page 200: ...s Potentiometer each 5 V pin 4 95 V to 5 05 V R18 labeled 5 V 5 V pin 4 95 V to 5 05 V R 11 labeled 5 V 3 3 V pin 3 25 V to 3 35 V R72 labeled 3 3 V Table 5 14 338 NON ADJUSTABLE POWER SUPPLY TOLERANCES J1 Pin Label Voltage Limits 12 V pin 11 0 V to 13 0 V 12V pin 11 0V to 13 0V 3 3 V pin 1 80 V to 2 20 V Figure 5 46 338 Power supply adjustments 5 80 ...

Page 201: ...anel 3 Adjust INTENSITY LIMIT CRT BIAS R247 on the A10 CRT board for optimum intensity 4 Press the start key to display a white stripe pattern 5 Loosen the mounting screw of L150 yoke coil 6 Rotate L150 so that the display is properly aligned in the window 7 Tighten the setting screw of L150 8 Adjust the magnets on L150 on the CRT ring to center the display 9 Adjust V SIZE R015 until the display b...

Page 202: ...on of 3 200 0 010V Threshold VA O VOLT Adjustment 1 Press the THRESHOLD key normal operating mode 2 Set Threshold LEVEL V1 to 0 0 V 3 Press the START key 4 Move the DMM plus lead to TP78 V1 4 on the A05 ROM board 5 Adjust VA O VOLT ADJ R78 on the A05 ROM board for a DMM indication of 0 000 0 010 V 6 Press the STOP key 7 Set Threshold LEVEL V1 to 10 0 V 8 Press the START key 9 Check that the DMM re...

Page 203: ...ress the STOP key 6 Set Threshold LEVEL V2 to 10 0 V 7 Press the START key 8 Check that the DMM reading is 2 500t0 010 V 9 Press the STOP key 10 Set Threshold LEVEL V2 to 10 0 V 11 Press the START key 12 Check that the DMM reading is 2 500 0 010 V 13 Press the STOP key 14 Disconnect the test leads Figure 5 48 338 Threshold voltage adjustment on the ROM board 5 83 ...

Page 204: ...to V1 5 Set CLK to EXTT 6 Select the Trigger menu and set the EVENTS field to 00000 WA OFF WB OFF WC This will cause the 338 to acquire data without triggering DC Balance 1 Ground the P6107 External Clock probe tip 2 Set Threshold LEVEL V1 to 0 0 V 3 Press the START key 4 Turn EXT CLK DC BALANCE R284 on the A02 INPUT B board to the counterclockwise end 5 Turn R284 clockwise slowly while observing ...

Page 205: ... the oscilloscope waveform and mark the point where the waveform moves from stationary low level to stationary high level 8 Then turn R287 to the clockwise end 9 Turn R287 counterclockwise slowly while observing the oscilloscope waveform and mark the point where the waveform moves from a stationary high level to a stationary low level 10 Adjust R287 to the center position between the points you ma...

Page 206: ...tationary low level to stationary high level 11 Turn the potentiometer to the clockwise end 12 Turn the potentiometer slowly while observing the oscilloscope waveform and mark the point where the waveform moves from stationary high level to stationary low level 13 Adjust the potentiometer to the center position between the points you marked in steps 10 and 12 14 Press the STOP key Table 5 15 338 D...

Page 207: ...plied on the probe for identification purposes If the P6107 External Clock Probe is a replacement the compensation must be altered Remove and discard the CALIB sticker Then perform the probe compensation procedure described in the Operating Instructions Section 3 of this manual See Probe Compensation under Diagnostic Test Descriptions We recommend that you install the colored marker band supplied ...

Page 208: ...ring EXT 1 Set CLK to EXT 2 Press the START key 3 Turn DELAY TIME of the A time base to place the rising edge of the channel 1 waveform on the center graticule 4 Turn delta TIME clockwise to obtain the delta T reading of 25 0 0 1 ns 5 Adjust EXT DELAY J220 14 to 20 on the A02 INPUT B board to place the rising edge of the channel 2 waveform within one division of the graticule centered on the risin...

Page 209: ... Oscilloscope 1 Pulse Generator 1 BNC 50 Ω termination 1 BNC T connector 2 BNC male to Probe tip Adapters 1 2 Square pin to Probe tip Adapter 2 Extender Boards 2 Board Ejectors Refer to Figures 5 51 and 5 52 Equipment Setup 1 Connect a 50 Ω terminator to the pulse generator OUTPUT Connect a BNC T connector to the 50 Ω terminator Connect the oscilloscope channel 1 probe tip to one side of the BNC T...

Page 210: ...0 slope Triggering Mode Coupling Source Auto AC INT Position rising edge at center screen Hold Off at minimum Time Div 10 ns 1 ns with magnification 4 Set the pulse generator as follows Termination BACK TERM switch pulled out Period 0 1 µs Duration 10ns 5 ns X 2 High level 0 35V Low level 0 35V 5 Select the A timebase and place the rising edge of the channel 1 waveform on the center graticule of t...

Page 211: ...ld to 00000 WA OFF WB OFF WC This will cause the 338 to acquire data without triggering 9 Press the START key 10 Repeat the following procedures 11 through 13 to adjust each clock delay with Extender boards shown in Table 5 16 11 Connect the oscilloscope channel 2 probe tip to the corresponding test point given in Table 5 16 12 Turn delta TIME clockwise to obtain the delta T reading of the clock d...

Page 212: ...55 40 1 00 TP200 2 A04 J300 A03 TRIG CLK 68 10 1 00 TP500 A03 J400 A03 Capacitor Adjustment 1 Refer to Figures 5 52 and 5 53 Set EXT CLK Threshold to V3 0 00 V 2 Set CLK to EXT 3 Set the Events field to 00000 WA OFF WB OFF WC This will cause the 338 to acquire data without triggering 4 Press the START key 5 Repeat the following procedures 6 through 8 to adjust each clock delay and or width as show...

Page 213: ... CLK 61 40 0 50 TP200 4 A04 C104 A03 Figure 5 52 338 Capacitor adjustment oscilloscope setup waveform Figure 5 53 338 Capacitor adjustment waveform SERIAL STATE ANALYZER 338S1 8 ADJUST THRESHOLD VOLTAGES ON THE A07 BOARD Equipment Required 1 Digital Multimeter DMM Refer to Figures 5 54 and 5 55 1 Power up the 338 2 Select the Serial mode any menu 3 Set Threshold LEVEL V1 and V2 to 0 0 V 4 Set the ...

Page 214: ...rd 11 Move the DMM plus lead to TP10 on the A07 S1 board 12 Adjust DC BALANCE R23 on the A07 S1 board for a DMM indication of V0 0 001 V voltage at threshold 0 13 Press the STOP key 14 Select the Threshold menu and set DATA V2 15 Press the START key 16 Check that the DMM indication is V0 0 001 V 17 Press the STOP key 18 Select the Threshold menu and set DATA V3 19 Press the START key 20 Check that...

Page 215: ...1 BNC T Connector 1 BNC male to Probe tip adapter 1 BNC 50 Ω cable Refer to Figures 5 56 and 5 57 1 Connect a 40 pF normalizer to the SERIAL DATA INPUT jack on the left side panel Install a BNC T connector to the 40 pF normalizer Connect a 50 Ω cable from the pulse generator OUTPUT to one side of the BNC T connector 2 Connect the oscilloscope channel 2 probe tip to the other side of the BNC T conn...

Page 216: ...e of the CH1 waveform most nearly matches the shape of the CH2 waveform 10 Presss the STOP key 11 Disconnect the 40 pF normalizer from the SERIAL DATA INPUT jack and from the BNC T connector 12 Connect the P6701 Serial Data Probe from the SERIAL DATA INPUT jack to the BNC male T connector 13 Remove the P6107 serial data probe calibration seal 14 Adjust the oscilloscope controls so that the channel...

Page 217: ...TM 11 6625 3145 14 Verification and Adjustment Procedures 318 338 Service Figure 5 56 338 Input capacitance adjustment Figure 5 57 338 Input capacitance waveform 5 97 ...

Page 218: ...101 on the A07 board clockwise until the oscilloscope reading is a stable low 7 Adjust NVM THRESHOLD by turning R101 in the opposite direction until the oscilloscope indication rises to a stable high level 8 Return 5 V POTENTIOMETER R11 on the A12 REGULATOR Board to a DMM indication equal to that recorded in step 3 above PERFORMANCE CHECK FOR THE 338 The Performance Check Procedure provides a deta...

Page 219: ...ort leads 012 0987 00 1 Test Fixture See Figure 5 2 1 BNC Female to Dual Banana Adapter 103 0090 00 SETUP Refer to Figure 5 58 1 Connect a BNC T connector to the pulse generator OUTPUT Connect the P6107 External Clock Probe tip to one side of the BNC T connector 2 Connect the oscilloscope channel 1 10X probe tip to the other side of the BNC T connector 3 Set the pulse generator as follows PERIOD 3...

Page 220: ...be DATA leads for Pods A through D to the power supply plus terminal 8 Power up and setup 338 as follows THRESHOLD MENU INPUT EXT CLK TTL POD A TTL POD B TTL POD C TTL POD D TTL TRIGGER MENU CLK EXTT POSN DELAY 00249 Events 00001 WA FLW D BY WB OFF WC Figure 5 58 338 Threshold voltage check setup 5 100 ...

Page 221: ... 18 as measured by the DVM 3 Press the START key and wait for the acquisition to be complete make sure that SLOW CLOCK is not displayed on the CRT 4 Press the DATA key until the STATE TABLE is displayed check that the data acquired is equal to the Expected Data given in Table 5 18 Table 5 18 338 VOLTAGE LEVELS FOR TESTING TTL Power Supply Pulse Generator Threshold Level Expected Output V High V Lo...

Page 222: ... V 3 all Fs 12 0 25 0 25 0 25 0 0 0 0 0 00 V 3 all O s 13 4 50 4 50 5 00 0 5 10 0 4 75 V 3 all Fs 14 5 00 4 50 5 00 0 5 10 0 4 75 V 3 all Os Make sure that the P6451 probe GND leads connect to the Power Supply Reference terminal the Reference terminal must be at the same potential as the 338 ground TEST 2 PARALLEL DATA ACQUISITION WORD RECOGNITION AND TRIGGER SEQUENCER CHECKS WITH EXTERNAL CLOCK M...

Page 223: ...of the Digital Delay s BNC T connector to the Digital Delay s START INPUT see Figure 5 59 Using 2 BNC elbows and a BNC female to female connector will help here 4 Connect the Digital Delay DLY D TRIG OUT to the 2 pulse generator s TRIG DURATION INPUT using a 42 inch BNC cable 5 Connect all the leads from Pod A and the Qualifier leads from Pods B C and D to the Test Fixture and then connect the Tes...

Page 224: ... oscilloscope triggering source to CH2 ONLY 13 Adjust DD501 EVENTS LEVEL slowly until the channel 2 waveform s falling edge crosses the channel 1 waveform s rising edge at 0 V mid screen See Figure 5 60 20 ns setup 0 ns hold NOTE Over adjustment of the EVENTS LEVEL will cause a loss of the DD501 triggering and oscilloscope display If the adjustment range is not adequate replace the 42 inch BNC cab...

Page 225: ...14 through 16 for each condition Table 5 20 338 PARALLEL DATA TEST OSCILLOSCOPE SETUP Controls Settings TIME DIV 5 nS Use 10X magnifier if necessary TRIGGERING AUTO AC INT CH1 only DISPLAY MODE ALT VOLTS DIV CH1 100 mV DC CH2 100 mV DC POSITION CH1 0 V GND set to the middle of screen CH2 0 V GND set to the middle of screen Table 5 21 338 PARALLEL DATA PULSE GENERATOR SETUP Pulse Generator 1 Pulse ...

Page 226: ...fication and Adjustment Procedures 318 338 Service Figure 5 59 338 Parallel data acquisiton test setup Figure 5 60 338 Parallel data acquisition Figure 5 61 338 Parallel data acquisition test waveform 1 test waveform 2 5 106 ...

Page 227: ...F 00 00 Means the 338 is never triggered Press the STOP key to stop data acquisition Table 5 23 338 PARALLEL DATA TEST CONDITION AND EXPECTATION CONDITION 1 2 3 Pulse Gen 2 connections Pod A Q only Q only Q only Q only Pod B Data 7 0 Q Q only Q only Pod C Q only Data 7 0 Q Q only Pod D Q only Q only Data 7 0 Q GROUP G1 B7 B0 C7 C0 D7 D0 21 Connect the P6451 probes to the 2 pulse generator using th...

Page 228: ...FF D OFF 28 Press the DATA key until the State Table is displayed and then press the START key 29 Check for the following data and proper trigger location 0 Always no data 1 or FF 2 00 3 FF T 4 00 Trigger location 30 Press the STOP key select the TRIGGER Menu and set word C to WC FF 31 Press the START key and check that the 338 does not trigger 32 Press the STOP key 33 Change the TRIGGER Menu as f...

Page 229: ...er location 43 Press the STOP key and then the TRIGGER key 44 Change the TRIGGER Menu as follows TRIGGER MENU Events 00002 WA OR WB OR WC WA XX WB 00 WC FF 45 Press the DATA key and then the START key 46 Check for the following data and proper trigger location 0 Always no data 1 Always no data 2 Always no data 3 Always no data 4 Always no data T 5 00 and or FF Check several acquisitions and insure...

Page 230: ...o observe b Adjust the oscilloscope horizontal POSITION to display the channel 2 waveform c Adjust DD501 EVENTS LEVEL slowly until the channel 2 waveform s falling edge crosses the channel 1 waveform s rising edge at 0 V mid screen See Figure 5 60 14 ns setup 0 ns hold NOTE If adjustment range is not adequate then replace the DLY D TRIG OUT BNC cable with a longer or shorter cable 55 Set the DD501...

Page 231: ...urn DD501 DELAY COUNT to 00001 65 Adjust DD501 EVENTS LEVEL slowly until the channel 2 waveform s falling edge crosses the channel 1 waveform s rising edge at 0 V mid screen See Figure 5 60 14 ns setup 0 ns hold 66 Move the P6451 probe to the next 338 PARALLEL DATA INPUT and select the corresponding 338 GROUP G1 x7 x0 67 Repeat steps 26 to 65 for each of the remaining PARALLEL DATA INPUTS C B A TE...

Page 232: ...ector Connect the oscilloscope channel 1 probe to the other side of the BNC T connector 2 Connect the 1 pulse generator s TRIG OUT to the 2 pulse generator s TRIG INPUT using a 42 inch BNC cable Figure 5 62 338 Glitch data acquisition test setup 3 Connect all the Pod A P6451 Probe leads to the Test Fixture pins connect the P6451 ground leads to those pins nearest the BNC connector all other pins a...

Page 233: ...FF POSITIVE GLITCH 1 Set the pulse generator according to Table 5 24 and Figure 5 63 Figure 5 63 338 Glitch data acquisition test waveform 1 Table 5 24 338 POSITIVE GLITCH PULSE GENERATOR SETUP Pulse Generator 1 2 Termination BACK TERM BACK TERM OUTPUT NORM NORM PERIOD 50 ns EXT TRIG DURATION 25 ns 5 ns 0 35 V level HIGH level 0 35 V 0 50 V LOW level 0 35 V 0 50 V NOTE HIGH level LOW level and DUR...

Page 234: ... Table press START check for Glitch Data select the next channel and repeat until all channels have been tested SRCH 1 249 data FF Figure 5 64 338 Glitch data acquisition test waveform 2 Table 5 25 338 NEGATIVE GLITCH PULSE GENERATOR SETUP Pulse Generator 1 2 Termination BACK TERM BACK TERM OUTPUT NORM COMPLEMENT PERIOD 50 ns EXT TRIG DURATION 25 ns 5 ns 0 35 V level HIGH level 0 35 V 0 50 V LOW l...

Page 235: ... until the State Table is displayed 5 Set the State Table submenu to SRCH WORD 01 01 6 Press the START key and check for the following display SRCH 1 13 Approximately WORD 01 01 G1 G2 H H 0 Always no data 1 Always no data 2 Always no data 3 Always no data 4 Always no data 5 Always no data 6 Always no data T 7 0X 0X Trigger location 8 0X 0X X Don t care 9 01 01 Start Output 10 01 01 11 01 01 12 01 ...

Page 236: ...M PERIOD 1µS HIGH LEVEL 2 80 V LOW LEVEL 0 00 V DURATION 20 nS 1 4 V level 5 Remove the 10X Probe and BNC to probe adapter from the pulse generator 6 Connect a BNC to Mini jack Cable from the 50 ohm terminator at the pulse generator s OUTPUT to the TRIG INPUT mini jack on the right side panel Connect the cable braid lead to the GND mini jack also on the right side panel 7 Power up and setup the as...

Page 237: ...et POWER switch to ON 2 Set major mode to SERIAL and press the EXECUTE key 3 Select the SETUP MENU and set the baud rate to 2400 4 Select the Threshold menu and set DATA and EXT CLK Threshold to 0 00 V 5 Allow 15 minutes for the 338 to stabilize 6 Connect test setup as shown in Figure 5 65 Figure 5 65 338 Serial state analyzer performance test setup 5 117 ...

Page 238: ...nd the serial data generator controls as indicated in step 1 of Table 5 25 and repeat preceding parts 11 through 14 Repeat steps 2 through 7 for the remainder of Table 5 25 NOTE Selection field for BITS WORD and COM MODE SYNC or ASYNC and BAUD RATE appear in the 338 SETUP Menu Selection fields for SYNC WORD and HUNT WORD are in the TRIGGER Menu To load SETUP parameters into the serial data generat...

Page 239: ...HAR 7 60 60 62 64 66 68 3 BITS WORD 6 BITS CHAR 6 20 20 22 24 26 28 4 BITS WORD 5 BITS CHAR 5 00 00 02 04 06 08 5 BAUD RATE EXT16 BITS CHAR 6 20 20 22 24 26 28 BITS WORD 6 6 COM MODE SYNC SETUP SYNC E0 E0 E2 E4 E6 E8 BITS WORD 8 BITS CHAR 8 FF FF FF SYNC WORD 1 16 CLOCK DERIVED SYNC WORD 2 16 INSERT DATA 16 16 TO TOP OF BUFFER 1 7 BITS WORD 5 BITS CHAR 5 00 02 04 06 08 SYNC WORD 1 AD SYNC WORD 2 0...

Page 240: ...e further problems after the first fault is corrected you must start over at the beginning block Some malfunctions especially those involving multiple simultaneous failures may require more elaborate approaches with frequent reference to the circuit descriptions in Section 4 TEST EQUIPMENT REQUIRED FOR MAINTENANCE Test equipment required to service the instrument is listed under Table 5 1 in Secti...

Page 241: ...ents 2 Transport and store static sensitive components or assemblies in their original containers on a metal rail or on conductive foam Label any package that contains static sensitive components or assemblies 3 Discharge the static voltage from your body by wearing a wrist strap while handling these components Servicing static sensitive assemblies should be performed only in a static free work st...

Page 242: ... expose contents of the battery to water Dispose of battery in accordance with local state and national regulations PREVENTIVE MAINTENANCE Preventive maintenance consists of periodic cleaning and inspection Accumulation of dust on components acts as an insulating blanket and prevents efficient heat dissipation This condition can cause overheating and component breakdown within the instrument Perio...

Page 243: ... electromechanical components use as little washing action as possible This prevents washing the lubricant out of the components and getting an excess of detergent into the contact areas of the switches DETERGENT RESIDUE WILL CAUSE CORROSION which may degrade instrument performance DO NOT use a freon based spray cleaner for cleaning the circuit boards Freon will damage aluminum capacitors DO NOT u...

Page 244: ... certain specifications for Tektronix To determine the manufacturer of a part refer to the Parts List Cross Index of Code Number to Manufacturer This is found in the Replaceable Electrical Parts section When ordering replacement parts from Tektronix include the following information 1 instrument type 2 instrument serial number 3 a description of the part if electrical include the component number ...

Page 245: ...le reading these instructions To replace pins 1 Use a 15 W soldering iron to unsolder the pin while pulling it out of the board with a pair of pliers 2 If the ferrule remained in the board carefully ream the solder out with a 0 031 inch drill If the ferrule came out with the pin clean the excess solder out of the hole with a solder removing wick and a scribe 3 If the ferrule remained in the board ...

Page 246: ...Y PRECAUTIONS DO NOT attempt any disassembly or installation procedures if the power is on DO NOT disconnect probes from the mainframe by pulling on the cables pull only on the plastic cable holders DO NOT remove connectors between circuit boards by pulling on the wires pull only on the connectors DO NOT press or pull on components when manipulating circuit boards GUARD against static discharge da...

Page 247: ...t the instrument from the power source before removing or replacing any component or assembly The exploded view drawing in the Replaceable Mechanical Parts section may be helpful in the removal or disassembly of individual components or sub assemblies Component locations are shown in the Diagrams section Read these instructions completely before attempting any corrective maintenance 6 8 ...

Page 248: ...abinet off the chassis being careful not to touch any conponents on the CRT circuit board To reinstall the cabinet slide it over the chassis Ensure that any cable leading from the boards fits into the recess in the boards See Figure 6 4 Figure 6 4 Cabinet removal Removing the Front Panel Front panel removal is accomplished by using a 1 16 inch hex key wrench to remove the four screws holding the f...

Page 249: ...tes for the power supply filter capacitors to discharge before proceeding with the next step 2 Support the power supply assembly with one hand while removing the four screws that fasten it to the main chassis Lift off the power supply assembly Refer to Figure 6 5 3 If the Inverter board is being taken out remove the screw that retains the cover plate at the top of the power supply assembly and lif...

Page 250: ... position it in place on the chassis and replace the four screws 8 Reinstall connections previously disconnected in step 5 while observing for correct arrow alignment 9 Position the cover plate in place and secure it with the two retaining screws 10 Secure the power supply assembly to the instrument main chassis with the four retaining screws 11 Reinstall the cabinet Figure 6 5 Power Supply Remova...

Page 251: ...he chassis 6 Carefully remove the CRT circuit board from the chassis 7 To reinstall the CRT circuit board position it into place on the chassis and secure it with the three retaining screws 8 Reconnect P040 P001 and P100 while observing correct arrow alignment 9 Reroute the high voltage lead and connect it to the CRT 10 Reinstall the cabinet Removing the Cathode Ray Tube CRT WARNING Use care when ...

Page 252: ... leaving sufficient work area in front of the CRT 6 Swing the bottom of the bezel outward and remove both the bezel and the light filter 7 Carefully guide the CRT out of the front of the 318 338 8 To reinstall the CRT carefully guide the replacement CRT into its housing from the front of the 318 338 9 Position the bezel and light filter over the face of the CRT and reinstall them This will require...

Page 253: ...318 ___________________ TROUBLESHOOTING TREES ...

Page 254: ...for help in locating the information you need 318 DIAGNOSTIC TEST DESCRIPTIONS INDEX OF 318 DIAGNOSTIC TEST DESCRIPTIONS Mainframe 1 Keyboard Test 2 CRT Test 3 Jump Table ROM Test 4 Display RAM Test 5 SYSTEM RAM Test 6 ROM Test Parallel Analyzer 7 Clock Test 8 Word Recognizer Test 9 Acquisition RAM Test 10 Sequence RAM Test 11 N DELAY Test 12 Threshold Test 13 SEQ Test 318S1 Serial Analysis RS232C...

Page 255: ...2 A04 U150 A03 U126 A03 U112 A04 U110 X X X X X A04 U146 A04 U142 A04 U114 A03 U112 A04 U110 X X A03 U156 A03 U158 A03 U112 A04 U110 A04 U148 VBB X X X A04 U148 A04 U144 A03 U112 A04 U110 X X A03 U146 A03 U108 A03 U126 A03 U112 X X X A01 U100 to U110 A02 U200 to U214 A02 U220 A02 U222 A01 U112 A01 U114 A02 U232 A02 U234 X X A03 U106 A03 U108 A03 U114 A03 U116 A03 U118 A03 U130 A03 U142 X X A03 U10...

Page 256: ...ard excepting the STOP key are connected to U300 and U310 8 bit priority encoder 4053BP on the A06 MPU DISPLAY board through the A08 Mother board U310 is enabled when U300 receives a key signal and issues an INT Maskable Interrupt to the MPU through the CR timer circuit The INT is controlled by U220 NAND gate TC4093 on the A06 board with KBMASKP from U100 hex D type flip flop with reset 74LS174 on...

Page 257: ... 11 19 21 29 0A 1A 22 2A 03 0B 13 1B 23 2B 0C 1C 24 2C 05 STOP 1D 25 2D Figure 7 1 318 Keyboard test schematic 2 CRT TEST Program CRT Function Power on None Troubleshooting The CRT generates the following four kinds of patterns for the CRT adjustment and visual check 1 Cross hatch pattern To adjust the CRT circuit 2 White pattern To check for phospor defects 7 4 ...

Page 258: ...s two bytes of data for each character to be displayed into the Display RAM through both U525 octal bus transceiver 40H245 and U500 display controller MB62110 on the A06 board The Display Controller sends the first address to the Display RAM to select the character code to be displayed and instructs U520 octal D type flip flop 40H273 on the A06 board to store the out put data from the Display RAM ...

Page 259: ... DFFF Troubleshooting None Description Refer to Figures 7 3 and 7 4 The diagnostic routine is located in addresses C000 through DFFF in the Jump Table ROM U026 64 K byte UV EPROM 2764 on the A05 ROM Threshold board Figure 7 3 318 Memory map The MPU addresses the Jump Table ROM on board A05 through U210 and U212 octal buffer line receiver with tri state output 74LS244 on the A06 MPU Display board v...

Page 260: ...5 via the A08 board The MPU calculates the checksum with all the data contained in the Jump Table ROM and compares it with the expected value also stored in this ROM If the values do not match the MPU issues an error message Figure 7 4 318 MPU memory address assignment 4 DISPLAY RAM TEST Program Function Power on The Display RAM is checked with a checkerboard marching pattern from E800 to EFFF A c...

Page 261: ...s to the Display RAM If there is competition between the MPU and the Display Controller for access to the Display RAM the Display Controller forces the MPU to wait until it completes the current read operation by asserting the WAIT signal to the MPU The MPU checks the Display RAM with a checkerboard marching pattern The read and write sequences are already mentioned in the preceding Power on parag...

Page 262: ...OM5 ROM6 U025 8000 BFFF ROM6 The chip select signals for ROM1 and ROM2 are decoded by U001 dual 2 line to 4 line decoder demultiplexer 74LS139 on the A05 ROM Threshold board All the other chip select signals are doubly decoded ROM3 ROM4 ROM5 and ROM6 are decoded by U001 B 74LS139 which is enabled by U001A 74LS 139 on the A05 board These ROMS are also selected by two data bits from U100 74LS174 on ...

Page 263: ...TM 11 625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 5 318 A03 and A04 Partial ACQ address assignment 7 10 ...

Page 264: ...g will appear on the screen The following programmable timebase ranges are available 20nS 50nS 100nS 200nS 500nS 1µS 100uS 1mS 10mS 1S Description Refer to Figure 7 6 The Slow Clock Detector compares the SYSCLK signal coming into this detector with the gate clock internally selected As long as the SYSCLK is two or more times as fast as the gate clock the slow clock flag is not set If the SYSCLK is...

Page 265: ...of U140 on the A04 board via the A08 board U 158 event delay counter uPD3Z198R on the A03 ACQ Control board generates the interrupt to the MPU when it receives the timer signal from U 140 on the A04 board This interrupt is sent to the MPU as INT via U156 comparator with open collector output µPD311C and via the A08 board The MPU reads the status by issuing READ STATUS at I O address 5Dhex through ...

Page 266: ...18 338 Service Figure 7 6 318 Clock test 8 WORD RECOGNIZER TEST Program WR Function Power on The word recognition WR RAMs are checked with the checkerboard marching pattern from 00 through FF Step 1 The word 15 is written into all RAM addresses 7 13 ...

Page 267: ... ADVANCE appears at the bottom of the the screen If START is pressed during LOOP tests the current loop of the test stops and the next loop of test is started You can change fields during tests Use this feature to catch intermittent faults and for circuit tracing with an oscilloscope In the I O Looping test only one or more OUT instructions subroutines including one of the following addresses will...

Page 268: ...DB4 and EDB5 Each output of these two WRs is wired together on the A08 Mother board and the outputs are sent to U136 and U138 dual type D master slave flip flop 10231 on the A03 ACQ Control board for triggering These signals are routed to U146 quad 2 input multiplexer latch 10173 on the A03 board The data to U146 10173 is latched by READ SQRAM from U112 binary to 1 8 line decoder 10162 through inv...

Page 269: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 7 318 Word recognizer test ...

Page 270: ...peatedly The I O address will appear on the screen When the field is set to ERROR the looping feature allows the tests in which an error is detected to be run repeatedly When the field is set to TEST the looping feature allows one test or sequence of tests to be run continuously When the field is set to OFF the looping feature is not available and one test or sequence of tests runs once When the I...

Page 271: ...The outputs of the flip flops are connected to each input of the ACQ memories on the A04 board through the A08 Mother board The addresses for the ACQ Memories are selected by U136 and U138 4 bit binary counter F10016 on the A04 board These counters are set to COUNT ENABLE by U156 quad 2 input NOR gate 10102 on the A03 ACQ Control board and are reset by RESET from U112 10162 on the A03 board At lea...

Page 272: ...al 3 input 3 output NOR gate 10211 on the A02 board Then this clock is returned to the Strobe Generator circuit on the A03 board and is also sent to U222A 10211 on the A02 board to produce DLDCLK in conjunction with DL104 delay line ZD10 20 on the A01 board DLDCLK clocks U122 and U128 10176 on the A01 board and U228 and U234 10176 on the A02 board The Strobe Generator on the A03 board delivers WE ...

Page 273: ... Function Power on The SQRAM is checked with the checkerboard marching pattern from 00 through FF Step 1 The word 55 is written into all RAM addresses Step 2 A word is read from a diagnostic cell and compared with the expected word 55 If the selected word is not equal to 55 an error message is displayed and the MPU is halted Step 3 The word AA is written into that diagnostic cell Then a word in sa...

Page 274: ...g function is available for the read cycle of the test The results of the read cycle verification will appear on the screen Refer to Appendix B of this manual for a description of error codes Description Refer to Figure 7 9 The SQRAM U144 256 word X 4 bit RAM HM10422 on the A03 ACQ Control board holds the trigger sequence table called Trigger menu The SQRAM receives data from U106 and U108 hex D m...

Page 275: ...ER F F Gate MPU Data A0 pin 13 U138 pin 15 U140 pin 2 D0 A1 pin 14 U150 pin 15 U140 pin3 D1 A2 pin 15 U136 pin 15 U140 pin 4 D2 A3 pin 16 U136 pin 2 U140 pin 13 D3 A4 pin 17 U138 pin 2 U140 pin 14 D4 A5 pin 9 U150 pin 3 U140 pin 15 D5 A6 pin 10 U134 pin 2 U154 pin 14 D6 A7 pin 11 U148 pin 14 U154 pin 3 D7 Figure 7 9 318 SQRAM test 7 22 ...

Page 276: ... Troubleshooting This is not a verificaion test so no test result will appear on the CRT screen This test should be observed on an oscilloscope The troubleshooting routine automatically tests the N DELAY Counter by alternately loading and running the counter first with N values as the Event counter and then with DELAY values for the Delay counter The user programs the N and DELAY values before beg...

Page 277: ...uit on the A03 board generate the TRIG CLK signal to the Event Delay counter By this procedure the value of the N register in the Event Delay counter is loaded into the counter itself To keep the Event Delay Counter enabled during the test the SQRAM must supply CE to the Event Delay Counter So the same setups mentioned above are repeated in order to load 0000binary into the SQRAM After that the MP...

Page 278: ...TM 11 6625 3145 14 Maintenance Troubleshooting 31 8 338 Service Figure 7 10 318 N and DELAY counter test 7 25 ...

Page 279: ... octal bus transceiver with 3 state output 74LS245 on the A06 MPU Display board through the A08 Mother board and U045 74LS245 on the A05 board When the MPU writes at I O address E0hex the WR and CS signals are sent to U070 DAC V1 to latch the data WR and CS for U080 DAC V2 are caused by the MPU s access at I O address E1hex The WR signal is delivered from U150C quadruple 2 input positive NOR gate ...

Page 280: ...the A02 board V3 is compared with ground by the U240C Comparator and this result is sent to 244C quad 2 inputNOR gate 10102 on the A02 board U244C is enabled by U224 hex D master slave flip flop 10176 on the A02 board when the MPU writes 0XXXXbinary into it at I O address 01 hex U244C 10102 on the A02 board outputs the Threshold TEST signal to U144 quad 2 input multiplexer 10158 on the A04 board v...

Page 281: ...re is available The Looping feature has 4 options OFF I O ERROR and TEST When the LOOP field is set to I O the looping feature allows only I O instructions to be run repeatedly The I O address will appear on the screen When the field is set to ERROR the looping feature allows the tests in which an error is detected to be run repeatedly When the field is set to TEST the looping feature allows one t...

Page 282: ... operation Pseudo data is generated in exactly the same way used in the WR and ACQ tests and applied to the latches on the A01 INPUT A and INPUT B boards The words WA WB and WC are set to 01hex 02hex and 03hex respectively Then full trigger sequence 00005 WA FLW D BY WB RESET ON WC is selected with 16 clocks of delay to stop after the trigger recognition The data AAAXBCAAXAAAXABXABCXABCXABCXABC is...

Page 283: ...ed from the address decoder on the MPU A06 board through bus connector 46B The NVM chip is selected by the inverse NVMCS and the power 5V monitor signal If the power moniter circuit detects low power 4 6V the NVM can not be selected NVM data is gated by U25 which is controlled by the BRD BIORQ and NVMCS signals The RD and WR signals these are the inverse signals of BRD and BWR control the directio...

Page 284: ...2 and U32 before reaching the SI0 All but one of the MODEM control signals are controlled by SIO Port B The exception is the DSR signal which appears in the 318S1 338S1 status register at address 80 All the signals coming into Port B are converted from RS 232 levels to TTL levels by the receiver U40 all outgoing signals are converted from TTL levels to RS 232 levels by the transmitter U41 RS 232 d...

Page 285: ...st The test data format is fixed at eight bits word even parity and one stop bit The data threshold is TTL and data polarity is NEGATIVE Description Refer to the 318S1 338S1 1 0 function list and the simplified diagram of the Serial Acquisition and RS 232 circuits when reading following SIO Port A is used for serial data acquisition The Port A address is 90 and 91 and the SERIAL parameter selector...

Page 286: ...84 8C 1 Write data 10 to address 8C 2 20 3 40 4 80 Repeat in rotation 1 through 4 90 Write data 55 to SIO Port A data register 91 1 Write data 18 reset command to SIO Port A register 0 2 Read SIO Port A register 0 Repeat 1 and 2 OPTION I O FUNCTION LIST I O ADDRESS 80 CHIP U32 FUNCTION OPTION STATUS REGISTER CONTROL READ ONLY bit 7 6 5 4 3 2 1 0 battery status xxxxx xxxxx xxxxx xxxxx MODEM DSR sta...

Page 287: ...baud select select select select xxxxx xxxxx xxxxx xxxxx as S3 as S2 as S1 as SO Table 7 13 318 SERIAL TEST BAUD SELECT BITS S3 S2 S1 S0 Selected Baud Rate OFF OFF OFF OFF NO CLOCK EXTERNAL CLOCK OFF OFF OFF ON NO CLOCK 19 2K OFF OFF ON OFF 50 OFF OFF ON ON 75 OFF ON OFF OFF 134 5 OFF ON OFF ON 200 OFF ON ON OFF 600 OFF ON ON ON 2400 ON OFF OFF OFF 9600 ON OFF OFF ON 4800 ON OFF ON OFF 1800 ON OFF...

Page 288: ...negative OFF sets the serial input data polarity to positive I O ADDRESS 90 CHIP U2 FUNCTION READ DATA OF SERIAL PORT CONTROL READ 1 O ADDRESS 91 CHIP U2 FUNCTION SERIAL DATA ACQUISITION CONTROL CONTROL READ AND WRITE I O ADDRESS 92 CHIP U2 FUNCTION READ AND WRITE DATA OF RS 232 PORT CONTROL READ AND WRITE I O ADDRESS 93 CHIP U2 FUNCTION RS 232 MODEM SIGNAL AND DATA CONTROL CONTROL READ AND WRITE ...

Page 289: ...ER 0 READ ERROR FOR SIO PORT B 159 9F RECEIVE READY FLAG NOT ON 160 A0 TRANSMIT EMPTY FLAG NOT OFF 162 A2 REGISTER 1 READ ERROR 163 A3 FRAMING ERROR FLAG NOT OFF 164 A4 OVER RUN ERROR FLAG NOT OFF 165 A5 PARITY ERROR FLAG NOT OFF 170 AA INCREMENT PATTERN DATA 01 FF LOOP BACK TEST FROM RS 232 OUTPUT TO RS 232 INPUT ERROR AT 110 BAUD 171 AB 150 BAUD 172 AC 300 BAUD 173 AD 600 BAUD 174 AE 1200 BAUD 1...

Page 290: ...T A 181 B5 RX READY NOT OFF 182 B6 REG 1 READ ERROR 183 B7 FRAMING ERR BIT NOT OFF 184 B8 OVER RUN ERR BIT NOT OFF 185 B9 PARITY ERR BIT NOT OFF 186 BA EXT TRIG BIT NOT OFF 187 BB EXT TRIG BIT NOT ON 188 BC DATA LOOP BACK TEST ERROR AT 75 BAUD FROM RS 232 OUTPUT TO SERIAL INPUT 189 BD 200 BAUD 190 BE 2400 BAUD 191 BF 1800 BAUD 192 C0 1200 BAUD 193 C1 300 BAUD 194 C2 110 BAUD 195 C3 9600 BAUD 7 37 ...

Page 291: ... cont 318 DIAGNOSTIC TEST FAILURE CODES PART 3 TSTNV2 NVM TEST Code Error Information 200 C8 DATA ERROR WHEN DATA PATTERN IS FF 201 C9 00 202 CA 01 203 CB 02 204 CC 04 205 CD 08 206 CE 10 207 CF 20 208 D0 40 209 D1 80 210 D2 MARCHING PATTERN 211 D3 INCREMENTING PATTERN 7 38 ...

Page 292: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 12 Troubleshooting Tree 1 Power On FIGURE 7 14 FIGURE 7 15 FIGURE 7 16 FIGURE 7 13 7 39 ...

Page 293: ...Maintenance Troubleshooting 318 338 Service Figure 7 13 Troubleshooting Tree 2 Startup Self Test FIGURE 7 17 FIGURE 7 18 FIGURE 7 19 FIGURE 7 20 FIGURE 7 21 FIGURE 7 22 FIGURE 7 23 FIGURE 7 24 FIGURE 7 25 FIGURE 7 14 7 40 ...

Page 294: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 14 Troubleshooting Tree 3 Power Supplies A11 A12 Sheet 1 of 2 7 41 ...

Page 295: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service 3B Figure 7 14 Troubleshooting Tree 3 Power Supplies A11 A12 Sheet 2 of 2 7 42 ...

Page 296: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 15 Troubleshooting Tree 4 CRT A10 Sheet 1 of 4 7 43 ...

Page 297: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 15 Troubleshooting Tree 4 CRT A10 Sheet 2 of 4 7 44 ...

Page 298: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 15 Troubleshooting Tree 4 CRT A10 Sheet 3 of 4 7 45 ...

Page 299: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 15 Troubleshooting Tree 4 CRT A10 Sheet 4 of 4 7 46 ...

Page 300: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 16 Troubleshooting Tree 5 MPU A06 Sheet 1 of 5 7 47 ...

Page 301: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 16 Troubleshooting Tree 5 MPU A06 Sheet 2 of 5 7 48 ...

Page 302: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 16 Troubleshooting Tree 5 MPU A06 Sheet 3 of 5 7 49 ...

Page 303: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 16 Troubleshooting Tree 5 MPU A06 Sheet 4 of 5 7 50 ...

Page 304: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 16 Troubleshooting Tree 5 MPU A06 Sheet 5 of 5 7 51 FIGURE 7 15 ...

Page 305: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 17 Troubleshooting Tree 6 Clock A04 Sheet 1 of 2 7 52 ...

Page 306: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 17 Troubleshooting Tree 6 Clock A04 Sheet 2 of 2 7 53 ...

Page 307: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 18 Troubleshooting Tree 7 Word Recognizer WR A01 A02 Sheet 1 of 3 7 54 ...

Page 308: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 18 Troubleshooting Tree 7 Word Recognizer WR A01 A02 Sheet 2 of 3 7 55 ...

Page 309: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 18 Troubleshooting Tree 7 Word Recognizer WR A01 A02 Sheet 3 of 3 7 56 FIGURE 7 17 ...

Page 310: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 19 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 1 of 6 7 57 ...

Page 311: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 19 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 2 of 6 7 58 FIGURE 7 18 ...

Page 312: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 19 Troubleshooting Tree 8 Data Acquisition ACO A01 A02 Sheet 3 of 6 7 59 ...

Page 313: ...TM 11 6625 3145 14 Figure 7 19 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 4 of 6 7 60 ...

Page 314: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 19 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 5 of 6 7 61 ...

Page 315: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 19 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 6 of 6 FIGURE 7 17 7 62 ...

Page 316: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 20 Troubleshooting Tree 9 SQRAM A03 Sheet 1 of 4 FIGURE 7 18 FIGURE 7 18 7 63 ...

Page 317: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 20 Troubleshooting Tree 9 SQRAM A03 Sheet 2 of 4 7 64 ...

Page 318: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 20 Troubleshooting Tree 9 SQRAM A03 Sheet 3 of 4 FIGURE 7 31 7 65 ...

Page 319: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 20 Troubleshooting Tree 9 SORAM A03 Shoot 4 of 4 FIGURE 7 17 7 66 ...

Page 320: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 21 Troubleshooting Tree 10 NDL A03 Sheet 1 of 2 FIGURE 7 22 7 67 ...

Page 321: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 21 Troubleshooting Tree 10 NDL A03 Sheet 2 of 2 FIGURE 7 22 7 68 ...

Page 322: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 22 Troubleshooting Tree 11 SEQ A03 Sheet 1 of 4 FIGURE 7 18 7 69 ...

Page 323: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 22 Troubleshooting Tree 11 SEQ A03 Sheet 2 of 4 FIGURE 7 20 7 70 FIGURE 7 19 ...

Page 324: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 22 Troubleshooting Tree 11 SEQ A03 Sheet 3 of 4 FIGURE 7 19 7 71 ...

Page 325: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 22 Troubleshooting Tree 11 SEQ A03 Sheet 4 of 4 FIGURE 7 20 7 72 ...

Page 326: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 23 Troubleshooting Tree 12 T H A01 A02 FIGURE 7 24 7 73 ...

Page 327: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 24 Troubleshooting Tree 13 T H A04 FIGURE 7 19 7 74 ...

Page 328: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 25 Troubleshooting Tree 14 SER A07 TSTSR2 Sheet 1 of 4 7 75 ...

Page 329: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 25 Troubleshooting Tree 14 SER A07 TSTSR2 Sheet 2 of 4 7 76 ...

Page 330: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 25 Troubleshooting Tree 14 SER A07 TSTSR2 Sheet 3 of 4 7 77 ...

Page 331: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 25 Troubleshooting Tree 14 SER A07 TSTSR2 Sheet 4 of 4 FIGURE 7 16 FIGURE 7 16 7 78 ...

Page 332: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 26 Troubleshooting Tree 15 RMT A07 TSTRM2 Sheet 1 of 4 7 79 ...

Page 333: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 26 Troubleshooting Tree 15 RMT A07 TSTRM2 Sheet 2 of 4 FIGURE 7 16 FIGURE 7 48 FIGURE 7 16 7 80 ...

Page 334: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 26 Troubleshooting Tree 15 RMT A07 TSTRM2 Sheet 3 of 4 FIGURE 7 16 7 81 ...

Page 335: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 26 Troubleshooting Tree 15 RMT A07 TSTRM2 Sheet 4 of 4 FIGURE 7 16 FIGURE 7 16 7 82 ...

Page 336: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 27 Troubleshooting Tree 16 Non Volatile Memory NVM A07 Sheet 1 of 2 FIGURE 7 16 7 83 ...

Page 337: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 27 Troubleshooting Tree 16 Non Volatile Memory NVM A07 Sheet 2 of 2 FIGURE 7 16 7 84 ...

Page 338: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 28 Troubleshooting Tree 17 Can t Get Glitch FIGURE 7 29 FIGURE 7 29 7 85 ...

Page 339: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 29 Troubleshooting Tree 18 Can t Get Good Data Sheet 1 of 2 7 86 ...

Page 340: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 29 Troubleshooting Tree 18 Can t Get Good Data Sheet 2 of 2 7 87 ...

Page 341: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 30 Troubleshooting Tree 19 Diagnostics Pass Can t Stop Sheet 1 of 2 FIGURE 7 29 7 88 ...

Page 342: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 30 Troubleshooting Tree 19 Diagnostics Pass Can t Stop Sheet 2 of 2 7 89 ...

Page 343: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 31 Troubleshooting Tree 20 Can t Get Glitch Trigger FIGURE 7 19 7 90 ...

Page 344: ...338 TROUBLESHOOTING TREES ...

Page 345: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 32 Troubleshooting Tree 21 Test Output Doesn t Work 7 91 7 92 blank ...

Page 346: ... Display RAM Test 5 SYSTEM RAM Test 6 ROM Test Parallel Analyzer 7 Clock Test 8 Word Recognizer Test 9 ACQ RAM Test 10 Sequence RAM Test 11 N DELAY Counter Test 12 Threshold Test 13 SEQ Test 318S1 Serial Analysis RS 232C NVM 14 Battery Test 15 Non Volatile Memory Test 16 RS 232 Test 17 Serial Test 338 DIAGNOSTIC TEST COMMON SIGNAL PATHS Some Diagnostic Tests share a common signal path for setting ...

Page 347: ... U142 A04 U114 A03 U112 A04 U110 X X A03 U156 A03 U158 A03 U112 A04 U110 A04 U148 VBB X X X A04 U148 A04 U144 A03 U112 A04 U110 X X A03 U146 A03 U108 A03 U126 A03 U112 X X X A01U 100 to U114 A02 U202 to U216 A02 U224 A02 U240 A01 U124 A01 U126 A02 U230 A02 U232 A01 U130 A01 U132 X X A03 U106 A03 U108 A03 U114 A03 U116 A03 U118 A03 U130 A03 U142 X X A03 U106 A03 U108 A03 U114 A03 U116 A03 U118 A03 ...

Page 348: ...09 board excepting the STOP key are connected to U300 and U310 8 bit priority encoder 4053BP on the A06 MPU Display board through the A08 Mother board U310 is enabled when U300 receives a key signal and issues a INT Maskable Interrupt to the MPU through the CR timer circuit The INT is controlled by U220 NAND gate TC4093 on the A06 board with KBMASKP from U100 hex D type flip flop with reset 74LS17...

Page 349: ...9 21 29 0A 1A 22 2A 03 0B 13 1B 23 2B 0C 1C 24 2C 05 STOP 1D 25 2D 4434 550 Figure 7 33 338 Keyboard test schematic 2 CRT TEST Program CRT Function Power on None Troubleshooting The CRT generates the following four kinds of patterns for the CRT adjustment and visual check 1 Cross hatch pattern To adjust the CRT circuit 2 White pattern To check for phospor defects 7 96 ...

Page 350: ...o bytes of data for each character to be displayed into the Display RAM through both U525 octal bus transceiver 40H245 and U500 display controller MB62110 on the A06 board The Display Controller sends the first address to the Display RAM to select the character code to be displayed and instructs U520 octal D type flip flop 40H273 on the A06 board to store the out put data from the Display RAM This...

Page 351: ...m from C000 to DFFF Troubleshooting None Description The diagnostic routine is located in addresses C000 through DFFF in the Jump Table ROM U026 64 K byte UV EPROM 2764 on the A05 ROM Threshold board Figure 7 35 338 Memory map The MPU addresses the Jump Table ROM on board A05 through U210 and U212 OCTAL BUFFER LINE RECEIVER WITH 3 STATE OUTPUT 74LS244 on the A06 MPU DISPLAY board via the A08 Mothe...

Page 352: ...at cell Then a word in the same cell is read back and is compared with AA If it is not equal to AA an error message is displayed and the MPU is halted Step 4 Steps 2 and 3 are repeated for all RAM addresses Troubleshooting None Description The read and write operation on the Display RAM U515 16 K bit static CMOS RAM uPD446 HM6116P on the A06 MPU Display board is completely controlled by Display Co...

Page 353: ...esses Troubleshooting None Description RAMs U400 F000 F7FF and U401 F800 FFFF on the A06 MPU Display board used by the MPU are called System RAMs The MPU data bus D0 D7 and the partial MPU Address Bus A0 A10 are directly connected to these RAMs The chip select signals RAM1CS and RAM2CS are generated by U005 dual 2 line to 4 line decoder multiplexer 74LS139 on the A05 ROM Threshold board These sign...

Page 354: ...e chip select signals for ROM1 and ROM2 are decoded by U001 dual 2 line to 4 line decoder demultiplexer 74LS139 on the A05 ROM Threshold board All the other chip select signals are doubly decoded ROM3 ROM4 ROM5 and ROM6 are decoded by U001 B 74LS139 which is enabled by U001A 74LS 139 on the A05 board These ROMS are also selected by two data bits from U100 74LS174 on the A05 board in order to const...

Page 355: ...decoders 74LS139 on the A05 board via U210 and U212 octal buffer line driver with tri state output 74LS 244 on the A06 MPU Display board and through the A08 board The MPU control signals are also provided through U214 octal buffer line driver with tri state output 74LS240 on the A06 board and through the A08 board The MPU calculates the checksum for each ROM and determines whether it is correct or...

Page 356: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 37 338 A03 and A04 partial ACQ address assignment 7 103 ...

Page 357: ...lock the slow clock flag is set This program also checks the clock path using the Slow Clock Detector The MPU selects the internal CLK by writing 11110binary into shift register U224 hex D master slave flip flop 10176 on the A02 INPUT B board at I O address 01hex This shift register enables U222B dual 3 input 3 output NOR gate 10211 on the A02 board which transmits the INTCLK signal The Slow Clock...

Page 358: ...selected by U144 quad 2 input multiplexer 10158 on the A04 board and is converted from ECL to TTL level Then it is fed to U152 on the A04 board for the MPU The MPU compares the slow clock flag with the expected value see Table 7 18 and displays an error message if it does not match Program ranges are shown in Table 7 18 7 105 ...

Page 359: ...ted Step 4 Steps 2 and 3 are repeated for all RAM addresses Troubleshooting This test is the same as that automatically run when the power is first turned on but here the looping test feature is available The looping test has four options OFF I O ERROR and TEST When the field is set to I O the looping feature allows only I O instructions to be run repeatedly The I O address will appear on the scre...

Page 360: ...s are wired together respectively with U220 and U222 F10016 and are used as a WR counter to set up the WR During acquisition U100 through U1 10 on the A01 board are clocked to latch data coming from the parallel data probes PE Parallel Load Enable is forced high by U228A quad 2 input NOR gate 10102 on the A02 board This control signal is delivered from U234 hex D master slave flip flop 10176 on th...

Page 361: ...tes X1XXXXbinary at I O address 51hex and READ SQRAM is generated by the MPU s access to I O address 5Bhex The four outputs of U146 10173 are connected to U142 quad 2 input multiplexer 10158 on the A04 board with the outputs of the ACQ Memories U116 through U130 HM10422 on the A04 board Thus all the ACQ Memories areset to off by forcing BS high This is done by writing 1Fhex into U114 hex D master ...

Page 362: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service 4434 567 Figure 7 39 338 Word recognizer test 7 109 ...

Page 363: ...cally when the power is turned on but here the looping feature is available The looping feature has four options OFF I O ERROR and TEST When the LOOP field is set to I O the looping feature allows only I O instructions to be run repeatedly The I O address will appear on the screen When the field is set to ERROR the looping feature allows the tests in which an error is detected to be run repeatedly...

Page 364: ...sed The operation for generating pseudo data is the same as that used in the WR Test The addresses for the ACQ Memories are pointed at by U136 and U138 4 bit binary counter F10016 on the A04 board These counters are set to count enable by U156 quad 2 input NOR gate 10102 on the A03 ACQ Control board and are reset by RESET from U112 10162 on the A03 board At least one pair of the ACQ Memories can b...

Page 365: ...multiplexer 10158 on the A04 board to the output of the ACQ Memories Some ACQ Memories outputs are wired together with the outputs of U146 quad 2 input multiplexer latch 10173 on the A03 board or with Threshold TEST from U252B quad 2 input NOR gate 10102 on the A02 board via the A08 Mother board These signals should be kept low in order to read the correct data from the ACQ Memories To write 0 s i...

Page 366: ...of tests to be run continuously When the field is set to OFF the looping feature is not available and one test or sequence of tests will run once When I O looping is selected only those OUT instructions subroutines included one of the addresses listed in Table 7 21 will run Unlesss the STOP key is pressed the program will continue looping continuously without displaying the result of the verificat...

Page 367: ...A04 board The carry is set when U136 and U138 F10016 on the A04 board both issue a carry bit at the same time Description Refer to Figure 7 41 The SQRAM U144 256 word X 4 bit RAM HM10422 on the A03 ACQ Control board holds the trigger sequence table named Trigger menu Figure 7 41 338 SQRAM test The SQRAM receives data from U106 and U108 hex D master slave flip flop 10176 on the A03 board with the f...

Page 368: ...3 D1 A2 pin 15 U136 pin 15 U140 pin 4 D2 A3 pin 16 U136 pin 2 U140 pin 13 D3 A4 pin 17 U138 pin 2 U140 pin 14 D4 A5 pin 9 U150 pin 3 U140 pin 15 D5 A6 pin 10 U134 pin 2 U154 pin 14 D6 A7 pin 11 U148 pin 14 U154 pin 3 D7 In order to set up the SQRAM the MPU data translated to ECL level points to the address of the SQRAM These data bits are gated as in the table above enabled by LDSQRAM from U108 5 ...

Page 369: ... 256 word X 4 bit RAM HM10422 on the A03 board The counter generates N 1 as a carry when it reaches full count This Event Delay counter has two registers the one which holds the N value is called the N register and the one which holds the DELAY value is called the DL register In this test the MPU writes 000Fhex as the N value into the N register at I O addresses 41hex and 42hex and 005Ahex as the ...

Page 370: ... for the SQRAM address until it receives an interrupt signal Once the interrupt occurs the MPU reads the status from I O address 5Dhex The signal path for reading the status is same as in the Clock Test The MPU checks to see whether the Event Delay counter Carry flag is set and also checks the number of STEP CLKs generated If the flag is set and the clock count is correct the MPU proceeds to the n...

Page 371: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service 4434490 Figure 7 42 338 N and DELAY counter test 7 118 ...

Page 372: ...hreshold V2 are programmed from 10 0V to 10 0V incrementally with 0 1V steps in order to generate the saw tooth waveform Description Refer to Figure 7 43 Two levels of voltage one for V1 and the other for V2 are produced by DAC U070 and U080 CMOS 8 bit buffered multiplying DAC AD7524 on the A05 ROM Threshold board When the MPU writes data into these DACs this setting is latched inside The data is ...

Page 373: ...4 Table 7 24 338 THRESHOLD TEST DATA VALUES V1 V2 V3 Expected 0 3V 83hex 0 1 V 7Fhex 0 2V 1 0 7V 87hex 0 5V 7Bhex 0 2V 1 1 1V 8Bhex 0 9V 77hex 0 2V 1 1 9V 93hex 1 7V 6Fhex 0 2V 1 3 5V A3hex 3 3V 5Fhex 0 2V 1 6 7V C3hex 6 5V 3Fhex 0 2V 1 0 3V 7Dhex 0 1V 81hex 0 2V 0 0 7V 79hex 0 5V 85hex 0 2V 0 1 1V 75hex 0 9V 89hex 0 2V 0 1 9V 6Dhex 1 7V 91hex 0 2V 0 3 5V 5Dhex 3 3V A1hex 0 2V 0 6 7V 3Dhex 6 5V C1...

Page 374: ...d to be run repeatedly When the field is set to TEST the looping feature allows one test or sequence of tests to be run continuously When the field is set to OFF the looping feature is not available and one test or sequence of tests will run once When I O Looping is selected only those selected OUT instructions subroutines including one of the addresses listed below will run Unless the STOP key is...

Page 375: ...m with the word sequence applied An error message is displayed if there are differences 338S1 SERIAL ANALYSIS RS232C NVM 14 BATTERY TEST Program TSTBTT Function Power on TSTBTT checks the battery voltage to see if it is more or less than 2 2 Volts Troubleshooting None Description Detected battery voltage status is shown in the option status register at bit 07 TSTBTT reads this bit from I O address...

Page 376: ...and DSR Function 2 includes seven test programs These programs check the SIO Port B initial status Function 3 includes nine test programs These programs transmit increment pattern data from SIO Port B then receive and compare that data against the original data Data speed is changed automatically from 110 baud through 9600 baud Test data format is fixed at 8 bits word even parity and one stop bit ...

Page 377: ... 80 Repeat in rotation 1 through 92 Write data 55 to SIO Port B data register 93 1 Write data 18 reset command to SIO Port B register 0 2 Read SIO Port B register 0 Repeat 1 and 2 17 SERIAL TEST Program TSTSR1 power on TSTSR2 Troubleshooting Setup Loop back test data of TSTSR2 is supplied from the RS 232 port so the P6107 serial in put probe must be connected to pin 2 of the RS 232 connector Refer...

Page 378: ...polarity bit and the external trigger polarity bit These are the parameters for Serial acquisition control U6 generates the receive data sampling clock and supplies this clock to SIO pin 13 U22 switches the input clock selector from either the 19 2 K internal clock or the External clock but the TSTSR2 program does not test this logic The external trigger polarity is defined by U12 and U22 latches ...

Page 379: ...to SIO Port A register 0 2 Read SIO Port A register 0 Repeat 1 and 2 OPTION I O FUNCTION LIST I O ADDRESS 80 CHIP U32 FUNCTION OPTION STATUS REGISTER CONTROL READ ONLY bit 7 6 5 4 3 2 1 0 battery MODEM external status xxxxx xxxxx xxxxx xxxxx xxxxx DSR trigger status bit 0 ON external trigger is occured OFF external trigger is not occured bit 1 ON DSR signal is OFF OFF DSR signal is ON bit 7 ON bat...

Page 380: ... xxxxx xxxxx as S3 as S2 as S1 as S0 Table 7 27 338 SERIAL TEST BAUD SELECT BITS S3 S2 S1 S0 Selected Baud Rate OFF OFF OFF OFF OFF NO CLOCK EXTERNAL CLOCK OFF OFF OFF ON NO CLOCK 19 2K OFF OFF ON OFF 50 OFF OFF ON ON 75 OFF ON OFF OFF 134 5 OFF ON OFF ON 200 OFF ON ON OFF 600 OFF ON ON ON 2400 ON OFF OFF OFF 9600 ON OFF OFF ON 4800 ON OFF ON OFF 1800 ON OFF ON ON 1200 ON ON OFF OFF 2400 ON ON OFF...

Page 381: ...put data polarity to negative OFF set serial input date polarity to positive I O ADDRESS 90 CHIP U2 FUNCTION READ DATA OF SERIAL PORT CONTROL READ I O ADDRESS 91 CHIP U2 FUNCTION SERIAL DATA ACQUISITION CONTROL CONTROL READ AND WRITE I O ADDRESS 92 CHIP U2 FUNCTION READ AND WRITE DATA OF RS 232 PORT CONTROL READ AND WRITE I O ADDRESS 93 CHIP U2 FUNCTION RS 232 MODEM SIGNAL AND DATA CONTROL CONTROL...

Page 382: ...ER 0 READ ERROR FOR SIO PORT B 159 9F RECEIVE READY FLAG NOT ON 160 A0 TRANSMIT EMPTY FLAG NOT OFF 162 A2 REGISTER 1 READ ERROR 163 A3 FRAMING ERROR FLAG NOT OFF 164 A4 OVER RUN ERROR FLAG NOT OFF 165 A5 PARITY ERROR FLAG NOT OFF 170 AA INCREMENT PATTERN DATA 01 FF LOOP BACK TEST FROM RS 232 OUTPUT TO RS 232 INPUT ERROR AT 110 BAUD 171 AB 150 BAUD 172 AC 300 BAUD 173 AD 600 BAUD 174 AE 1200 BAUD 1...

Page 383: ... A 181 B5 RX READY NOT OFF 182 B6 REG 1 READ ERROR 183 B7 FRAMING ERR BIT NOT OFF 184 B8 OVER RUN ERR BIT NOT OFF 185 B9 PARITY ERR BIT NOT OFF 186 BA EXT TRIG BIT NOT OFF 187 BB EXT TRIG BIT NOT ON 188 BC DATA LOOP BACK TEST ERROR AT 75 BAUD FROM RS 232 OUTPUT TO SERIAL INPUT 189 BD 200 BAUD 190 BE 2400 BAUD 191 BF 1800 BAUD 192 C0 1200 BAUD 193 C1 300 BAUD 194 C2 110 BAUD 195 C3 9600 BAUD 7 130 ...

Page 384: ...338 DIAGNOSTIC TEST FAILURE CODES PART 3 TSTNV2 NVM TEST Code Error Information 200 C8 DATA ERROR WHEN DATA PATTERN IS FF 201 C9 00 202 CA 01 203 CB 02 204 CC 04 205 CD 08 206 CE 10 207 CF 20 208 D0 40 209 D1 80 210 D2 MARCHING PATTERN 211 D3 INCREMENTING PATTERN 7 131 7 132 blank ...

Page 385: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 44 Troubleshooting Tree 1 Power On FIGURE 7 46 FIGURE 7 47 FIGURE 7 45 FIGURE 7 48 7 133 ...

Page 386: ...14 Maintenance Troubleshooting 318 338 Service Figure 7 45 Troubleshooting Tree 2 Self Test FIGURE 7 49 FIGURE 7 48 FIGURE 7 51 FIGURE 7 52 FIGURE 7 53 FIGURE 7 54 FIGURE 7 55 FIGURE 7 57 FIGURE 7 58 FIGURE 7 59 7 134 ...

Page 387: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 46 Troubleshooting Tree 3 Power Supplies A11 A12 Sheet 1 of 2 7 135 ...

Page 388: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 46 Troubleshooting Tree 3 Power Supplies A11 A12 Sheet 2 of 2 7 136 ...

Page 389: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 47 Troubleshooting Tree 4 CRT A10 Sheet 1 of 4 7 137 ...

Page 390: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 47 Troubleshooting Tree 4 CRT A10 Sheet 2 of 4 7 138 ...

Page 391: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 47 Troubleshooting Tree 4 CRT A10 Sheet 3 of 4 7 139 ...

Page 392: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 47 Troubleshooting Tree 4 CRT A10 Sheet 4 of 4 7 140 ...

Page 393: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 48 Troubleshooting Tree 5 MPU A06 Sheet 1 of 5 7 141 ...

Page 394: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 48 Troubleshooting Tree 5 MPU A06 Sheet 2 of 5 7 142 ...

Page 395: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 48 Troubleshooting Tree 5 MPU A06 Sheet 3 of 5 7 143 ...

Page 396: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 48 Troubleshooting Tree 5 MPU A06 Sheet 4 of 5 7 144 ...

Page 397: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 48 Troubleshooting Tree 5 MPU A06 Sheet 5 of 5 FIGURE 7 47 7 145 ...

Page 398: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 49 Troubleshooting Tree 6 Clock A04 CLK Sheet 1 of 2 7 146 ...

Page 399: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 49 Troubleshooting Tree 6 Clock A04 CLK Sheet 2 of 2 7 147 ...

Page 400: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 50 Troubleshooting Tree 7 Word Recognizer WR A01 A02 Sheet 1 of 4 7 148 ...

Page 401: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 50 Troubleshooting Tree 7 Word Recognizer WR A01 A02 Sheet 2 of 4 7 149 ...

Page 402: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 50 Troubleshooting Tree 7 Word Recognizer WR A01 A02 Sheet 3 of 4 7 150 ...

Page 403: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 50 Troubleshooting Tree 7 Word Recognizer WR A01 A02 Sheet 4 of 4 FIGURE 7 49 7 151 ...

Page 404: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 51 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 1 of 7 7 152 ...

Page 405: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 51 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 2 of 7 7 153 FIGURE 7 50 ...

Page 406: ...TM 11 6625 3145 14 Maintenance Troubieshooting 318 338 Service Figure 7 51 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 3 of 7 7 154 ...

Page 407: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 51 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 4 of 7 7 155 ...

Page 408: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 51 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 5 of 7 7 156 ...

Page 409: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 51 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 6 of 7 7 157 ...

Page 410: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 51 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 7 of 7 7 158 FIGURE 7 49 7 158 ...

Page 411: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 52 Troubleshooting Tree 9 SQRAM A03 Sheet 1 of 4 FIGURE 7 50 FIGURE 7 50 7 159 ...

Page 412: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 52 Troubleshooting Tree 9 SQRAM A03 Sheet 2 of 4 7 160 ...

Page 413: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 52 Troubleshooting Tree 9 SQRAM A03 Sheet 3 of 4 FIGURE 7 63 7 161 ...

Page 414: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 52 Troubleshooting Tree 9 SQRAM A03 Sheet 4 of 4 7 162 FIGURE 7 49 7 162 ...

Page 415: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 53 Troubleshooting Tree 10 NDL A03 Sheet 1 of 2 FIGURE 7 54 7 163 ...

Page 416: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 53 Troubleshooting Tree 10 NDL A03 Sheet 2 of 2 FIGURE 7 54 7 164 ...

Page 417: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 54 Troubleshooting Tree 11 SEQ A03 Sheet 1 of 4 FIGURE 7 50 7 165 ...

Page 418: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 54 Troubleshooting Tree 11 SEQ A03 Sheet 2 of 4 FIGURE 7 51 FIGURE 7 52 7 166 ...

Page 419: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 54 Troubleshooting Tree 11 SEQ A03 Sheet 3 of 4 FIGURE 7 51 7 167 ...

Page 420: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 54 Troubleshooting Tree 11 SEQ A03 Sheet 4 of 4 7 168 FIGURE 7 52 7 168 ...

Page 421: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 55 Troubleshooting Tree 12 T H A01 A02 7 169 ...

Page 422: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 56 Troubleshooting Tree 13 T H A04 FIGURE 7 51 7 170 ...

Page 423: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 57 Troubleshooting Tree 14 SER A07 TSTSR2 Sheet 1 of 4 7 171 ...

Page 424: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 57 Troubleshooting Tree 14 SER A07 TSTSR2 Sheet 2 of 4 7 172 ...

Page 425: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 57 Troubleshooting Tree 14 SER A07 TSTSR2 Sheet 3 of 4 7 173 ...

Page 426: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 57 Troubleshooting Tree 14 SER A07 TSTSR2 Sheet 4 of 4 FIGURE 7 48 FIGURE 7 48 7 174 ...

Page 427: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 58 Troubleshooting Tree 15 REMOTE A07 TSTRM2 RMT Sheet 1 of 4 7 175 ...

Page 428: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 58 Troubleshooting Tree 15 REMOTE A07 TSTRM2 RMT Sheet 2 of 4 FIGURE 7 48 FIGURE 7 48 7 176 ...

Page 429: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 58 Troubleshooting Tree 15 REMOTE A07 TSTRM2 RMT Sheet 3 of 4 FIGURE 7 48 7 177 ...

Page 430: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 58 Troubleshooting Tree 15 REMOTE A07 TSTRM2 RMT Sheet 4 of 4 FIGURE 7 48 FIGURE 7 48 7 178 ...

Page 431: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 59 Troubleshooting Tree 16 Non Volatile Memory NVM A07 Sheet 1 of 2 FIGURE 7 48 7 179 ...

Page 432: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 59 Troubleshooting Tree 16 Non Volatile Memory NVM A07 Sheet 2 of 2 FIGURE 7 48 7 180 ...

Page 433: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 60 Troubleshooting Tree 17 Can t Get Glitch 7 181 ...

Page 434: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 61 Troubleshooting Tree 18 Can t Get Good Data Sheet 1 of 2 7 182 ...

Page 435: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 61 Troubleshooting Tree 18 Can t Get Good Data Sheet 2 of 2 7 183 ...

Page 436: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 62 Troubleshooting Tree 19 Diagnostics Pass Can t Stop 7 184 ...

Page 437: ... TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 63 Troubleshooting Tree 20 Can t Get Glitch Trigger 7 185 ...

Page 438: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 64 Troubleshooting Tree 21 Test Output Doesn t Work 7 186 ...

Page 439: ...ples of this numbering method and typical expansions are illustrated by the following Only the circuit number will appear on the diagrams and circuit board illustrations Each diagram and circuit board illustration is clearly marked with the assembly number Assembly numbers are also marked on the mechanical exploded views located in the Mechanical Parts List The component number is obtained by addi...

Page 440: ...R SANTA CLARA CA 95051 31918 IEE SCHADOW INC 8081 WALLACE ROAD EDEN PRAIRIE MN 55343 50434 HEWLETT PACKARD COMPANY 640 PAGE MILL ROAD PALO ALTO CA 94304 51642 CENTRE ENGINEERING INC 2820 E COLLEGE AVENUE STATE COLLEGE PA 16801 54583 TDK ELECTRONICS CORP 755 EASTGATE BLVD GARDEN CITY NY 11530 55680 NICHICON AMERICA CORP 6435 N PROESEL AVENUE CHICAGO IL 60645 56289 SPRAGUE ELECTRIC CO 87 MARSHALL ST...

Page 441: ...9 670 7811 00 A08 318 338 ONLY A09 260 2133 00 SWITCH PB ASSY KEYBOARD 80009 260 2133 00 A09 18 338 ONLY A10 670 7810 00 CKT BOARD ASSY CRT CIRCUIT 80009 670 7810 00 A10 318 338 ONLY A11 670 7821 00 CKT BOARD ASSY INVERTER 80009 670 7821 00 A11 318 338 ONLY A12 670 7820 00 CKT BOARD ASSY REGULATOR 80009 670 7820 00 A12 318 338 ONLY A01 670 7819 00 CKT BOARD ASSY DATA INPUT A 80009 670 7819 00 A01 ...

Page 442: ... 16V 0000M 290 0995 00 A01C136 318 ONLY A01C138 290 0995 00 CAP FXD ELCTLT 47UF 20 16V 0000M 290 0995 00 A01C138 318 ONLY A01C140 281 0819 00 CAP FXD CER DI 33PF 5 50V 72982 8035BC0G330 A01C140 318 ONLY A01C142 281 0819 00 CAP FXD CER DI 33PF 5 50V 72982 8035BC0G330 A01C142 318 ONLY A01CR110 152 0327 00 SEMICOND DEVICE SIG SI BAX13 T0191 152 0327 00 A01CR112 152 0581 01 SEMICOND DEVICE RECT S1 20V...

Page 443: ... 0000M 307 0866 00 A01R106 318 ONLY A01R106 315 0101 00 RES FXD CMPSN 100 OHM 5 0 25W 57668 NTR25J E 100E A01R106 338 ONLY A01R108 307 0866 00 RES NTWK FXD FI 8 100 OHM 5 0 1W 0000M 307 0866 00 A01R108 318 ONLY A01R110 321 0207 00 RES FXD FILM 1 4K OHM 1 0 125W 91637 MFF1816G14000F A01R110 318 ONLY A01R110 315 0472 00 RES FXD CMPSN 4 7K OHM 5 0 25W 57668 NTR25J E04K7 A01R110 338 ONLY A01R112 321 0...

Page 444: ...68 NTR25J E 03K3 A01R140 318 ONLY A01R140 315 0511 00 RES FXD CMPSN 510 OHM 5 0 25W 01121 CB5115 A01R140 338 ONLY A01R142 307 0111 00 RES FXD CMPSN 3 6 OHM 5 0 25W 01121 CB36G5 A01R142 318 ONLY A01R142 315 0511 00 RES FXD CMPSN 510 OHM 5 0 25W 01121 CB5115 A01R142 338 ONLY A01R144 315 0511 00 RES FXD CMPSN 510 OHM 5 0 25W 01121 CB5115 A01R144 338 ONLY A01R146 315 0102 00 RES FXD CMPSN 1K OHM 5 0 2...

Page 445: ... ONLY A01U114 155 0215 00 MICROCIRCUIT DI LOGIC ANALYZER INPUT 16 DIP 80009 155 0215 00 A01U114 318 ONLY A01U114 156 0368 00 MICROCIRCUIT DI QUAD TTL TO ECL CONVERTER 04713 MC10124L A01U114 338 ONLY A01U116 156 1784 00 MICROCIRCUIT LI DUAL COMPARATOR 0000M 156 1784 00 A01U116 318 ONLY A01U118 156 0651 00 300101 300280 MICROCIRCUIT DI 8 BIT PRL OUT SER SHF RGTR 01295 SN74LS164NP3 A01U118 318 ONLY A...

Page 446: ...00 300101 300280 MICROCIRCUIT DI 3 8 LINE DCDR SCRN 01295 SN74LS138 A01U130 318 ONLY A01Ul30 156 0469 02 300281 MICROCIRCUIT DI 3 8 LINE DCDR 01295 SN74LS138NP3 A01U130 318 ONLY A01U132 156 0368 00 MICROCIRCUIT DI QUAD TTL TO ECL CONVERTER 04713 MC10124L A01U132 318 ONLY A01U134 156 0633 00 MICROCIRCUIT DI HEX D MASTER SLAVE F F 80009 156 0633 00 A01U134 318 ONLY A01U136 156 1172 00 300101 300280 ...

Page 447: ...A02C226 281 077500 CAP FXD CER DI 0 1UF 20 50V 04222 MA205E104MAA A02C226 318 ONLY A02C226 281 0815 00 CAP FXD CER DI 0 027UF 20 50V 72982 8005D9AABW5R273M A02C226 338 ONLY A02C228 281 0775 00 CAP FXD CER DI 0 1UF 20 50V 04222 MA205E104MAA A02C228 318 ONLY A02C230 281 0775 00 CAP FXD CER DI 0 1UF 20 50V 04222 MA205E104MAA A02C230 318 ONLY A02C230 281 0815 00 CAP FXD CER DI 0 027UF 20 50V 72982 800...

Page 448: ...1 0775 00 CAP FXD CER DI 0 1UF 20 50V 04222 MA205E104MAA A02C278 281 0778 00 300101 300330 CAP FXD CER DI 1 8PF 20 50V A02C278 318 ONLY A02C280 290 0995 00 CAP FXD ELCTLT 47UF 20 16V 0000M 290 0995 00 A02C280 338 ONLY A02C282 290 0995 00 CAP FXD ELCTLT 47UF 20 16V 0000M 290 0995 00 A02C282 338 ONLY A02C284 281 0815 00 CAP FXD CER DI 0 027UF 20 50V 72982 8005D9AABW5R273M A02C284 338 ONLY A02C286 28...

Page 449: ... FEMALE 13511 31 279 A02J212 338 ONLY A02J220 131 2931 00 CONN RCPT ELEC HEADER ANGLE 2 X 12 0000M 131 2931 00 A02J220 338 ONLY A02Q106 151 0188 00 TRANSISTOR PNP SI TO 92 T0058 2N3906 A02Q108 151 1032 00 TRANSISTOR SILICON FET DUAL 17856 DN399 A02R200 307 0875 00 RES NTWK FXD FI 4 75 OHM 5 0 1W 0000M 307 0875 00 A02R200 318 ONLY A02R200 307 0874 00 RES NTWK FXD FI 8 75 OHM 5 0 1W 0000M 307 0874 0...

Page 450: ...W 0000M 307 0874 00 A02R226 338 ONLY A02R228 315 0470 00 RES FXD CMPSN 47 OHM 5 0 25W 57668 NTR25J E47E0 A02R228 318 ONLY A02R228 307 0874 00 RES NTWK FXD FI 8 75 OHM 5 0 1W 0000M 307 0874 00 A02R228 338 ONLY A02R230 321 0030 00 RES FXD FILM 20 OHM 1 0 125W 91637 CMF55116G20R00F A02R230 318 ONLY A02R230 307 0874 00 RES NTWK FXD FI 8 75 OHM 5 0 1W 0000M 307 0874 00 A02R230 338 ONLY A02R232 315 0100...

Page 451: ... 25W 57668 NTR25J E 100E A02R270 318 ONLY A02R270 315 0272 00 RES FXD CMPSN 2 7K OHM 5 0 25W 57668 NTR25J E02K7 A02R270 338 ONLY A02R272 315 0470 00 RES FXD CMPSN 47 OHM 5 0 25W 57668 NTR25J E47E0 A02R272 338 ONLY A02R274 321 0481 04 RES FXD FILM 1M OHM 0 1 0 125W 91637 CMF55116D10003B A02R274 338 ONLY A02R276 315 0104 00 RES FXD CMPSN 100K OHM 5 0 25W 57668 NTR25J E100K A02R276 338 ONLY A02R278 3...

Page 452: ...A02R312 315 0511 00 RES FXD CMPSN 510 OHM 5 0 25W 01121 CB5115 A02R312 318 ONLY A02R312 321 0929 07 RES FXD FILM 2 5K OHM 0 10 0 125W 91637 CMF55116C25000B A02R312 338 ONLY A02R314 315 0510 00 RES FXD CMPSN 51 OHM 5 0 25W 57668 NTR25J E51 E0 A02R314 318 ONLY A02R314 321 0929 07 RES FXD FILM 2 5K OHM 0 10 0 125W 91637 CMF55116C25000B A02R314 338 ONLY A02R316 315 0432 00 RES FXD CMPSN 4 3K OHM 5 0 2...

Page 453: ... 00 RES FXD CMPSN 10K OHM 5 0 25W 57668 NTR25J E10K0 A02R334 318 ONLY A02R334 315 0511 00 300101 300114 RES FXD CMPSN 51 0 OHM 5 0 25W 01121 CB5115 A02R334 338 ONLY A02R334 315 0510 00 300115 300115 RES FXD CMPSN 51 OHM 5 0 25W 57668 NTR25J E51 E0 A02R334 338 ONLY A02R334 315 0152 00 300116 RES FXD CMPSN 1 5K OHM 5 0 25W 57668 NTR25J E01K5 A02R334 338 ONLY A02R336 321 0261 00 RES FXD FILM 5 11K OH...

Page 454: ...02U216 155 0215 00 MICROCIRCUIT DI LOGIC ANALYZER INPUT 16 DIP 80009 155 0215 00 A02U216 318 ONLY A02U216 156 1769 00 MICROCIRCUIT LI ULTRA FIRST COMPARATOR DUAL 0000M 156 1769 00 A02U216 338 ONLY A02U218 156 0651 00 300101 300280 MICROCIRCUIT DI 8 BIT PRL OUT SER SHF RGTR 01295 SN74LS164NP3 A02U218 318 ONLY A02U218 156 0651 02 300281 MICROCIRCUIT DI 8 BIT PRL OUT SER SHF RGTR 01295 SN74LS164 NP3 ...

Page 455: ...0000M 156 0308 05 A02U236 338 ONLY A02U238 156 0633 00 MICROCIRCUIT DI HEX D MASTER SLAVE F F 80009 156 0633 00 A02U238 318 ONLY A02U238 156 0308 05 MICROCIRCUIT DI RECEIVER QUAD DIFF LINE 0000M 156 0308 05 A02U238 338 ONLY A02U240 156 1783 00 MICROCIRCUIT LI QUAD COMPARATOR 0000M 156 1783 00 A02U240 318 ONLY A02U240 156 0308 05 MICROCIRCUIT DI RECEIVER QUAD DIFF LINE 0000M 156 0308 05 A02U240 338...

Page 456: ...ER DI 0 1UF 20 50V 04222 MA205E104MAA A03C236 281 0775 00 CAP FXD CER DI 0 1UF 20 50V 04222 MA205E104MAA A03C238 281 0775 00 CAP FXD CER DI 0 1UF 20 50V 04222 MA205E104MAA A03C240 281 0775 00 CAP FXD CER DI 0 1UF 20 50V 04222 MA205E104MAA A03C242 281 0775 00 CAP FXD CER DI 0 1UF 20 50V 04222 MA205E104MAA A03C244 290 0995 00 CAP FXD ELCTLT 47UF 20 16V 0000M 290 0995 00 A03C246 281 0775 00 CAP FXD C...

Page 457: ...8 ONLY A03U106 156 0633 00 MICROCIRCUIT DI HEX D MASTER SLAVE F F 80009 156 0633 00 A03U108 156 0633 00 MICROCIRCUIT DI HEX D MASTER SLAVE F F 80009 156 0633 00 A03U110 156 1495 01 MICROCIRCUIT DI 1 OF 8 DECODER 0000M 156 1495 01 A03U112 156 1495 01 MICROCIRCUIT DI 1 OF 8 DECODER 0000M 156 1495 01 A03U114 156 0295 00 MICROCIRCUIT DI TRIPLE EXCL OR EXCL NOR 80009 156 0295 00 A03U114 338 ONLY A03U11...

Page 458: ...ICROCIRCUIT DI DUAL 4 5 INPUT OR NOR 0000M 156 0229 02 A03U154 156 0458 00 MICROCIRCUIT DI QUAD AND GATE 2 INP 04713 MC10104L A03U156 156 0205 00 MICROCIRCUIT DI QUAD 2 INPUT NOR GATE 04713 MC10102 P OR L A03U158 156 1715 00 MICROCIRCUIT DI EVENT DELAY COUNTER 0000M 156 1715 00 A03W100 131 0566 00 BUS CONDUCTOR DUMMY RES 2 375 22 AWG 57668 JWW 0200E0 A03W100 318 ONLY A03W102 131 0566 00 BUS CONDUC...

Page 459: ...8 100 OHM 5 0 125W 0000M 307 0876 00 A04R104 307 0876 00 RES NTWK FXD FI 8 100 OHM 5 0 125W 0000M 307 0876 00 A04R106 307 0876 00 RES NTWK FXD FI 8 100 OHM 5 0 125W 0000M 307 0876 00 A04R108 307 0876 00 RES NTWK FXD FI 8 100 OHM 5 0 125W 0000M 307 0876 00 A04R108 338 ONLY A04R110 315 0102 00 RES FXD CMPSN 1K OHM 5 0 25W 57668 NTR25JE01K0 A04R112 307 0877 00 RES NTWK FXD FI 8 510 OHM 5 0 125W 0000M...

Page 460: ...104 156 0368 04 300101 300392 MICROCIRCUIT DI QUAD TTL TO ECL COMPARATOR 0000M 156 0368 04 A04U104 338 ONLY A04U104 156 0368 00 300393 MICROCIRCUIT DI QUAD TTL TO ECL CONVERTER 04713 MC10124L A04U104 338 ONLY A04U106 156 0368 04 300101 300460 MICROCIRCUIT DI QUAD TTL TO ECL COMPARATOR 0000M 156 0368 04 A04U106 318 ONLY A04U106 156 0368 00 300461 MICROCIRCUIT DI QUAD TTL TO ECL CONVERTER 04713 MC10...

Page 461: ...10422A A04U122 338 ONLY A04U124 156 1773 00 300101 300720 MICROCIRCUIT DI 256 WORD X 4 BIT RAM 0000M 156 1773 00 A04U124 318 ONLY A04U124 156 1635 00 300721 MICROCIRCUIT DI 256 X 4SRAM 24 PIN DIP CER 27014 DM10422A A04U124 318 ONLY A04U124 156 1775 00 300101 300745 MICROCIRCUIT DI 256 WORD X 4 BIT RAM 0000M 156 1775 00 A04U124 338 ONLY A04U124 156 1635 00 300746 MICROCIRCUIT DI 256 X 4 SRAM 24 PIN...

Page 462: ...140 156 1716 00 MICROCIRCUIT DI TIME BASE 0000M 156 1716 00 A04U142 156 0746 02 MICROCIRCUIT DI QUAD 2 INPUT NON INV MUX 0000M 156 0746 02 A04U144 156 0746 02 MICROCIRCUIT DI QUAD 2 INPUT NON INV MUX 0000M 156 0746 02 A04U146 156 0316 00 MICROCIRCUIT DI QUAD ECL TO TTL CONVERTER 04713 MC10125L A04U148 156 0316 00 MICROCIRCUIT DI QUAD ECL TO TTL CONVERTER 04713 MC10125L A04U150 156 0316 00 MICROCIR...

Page 463: ...5R026 315 0472 00 RES FXD CMPSN 4 7K OHM 5 0 25W 57668 NTR25J E04K7 A05R040 307 0750 00 RES NTWK FXD FI 8 4 7K OHM 100 0 125W T0191 307 0750 00 A05R060 321 0177 00 RES FXD FILM 681 OHM 1 0 125W 01121 ORD BY DESCR A05R062 321 0285 00 RES FXD FILM 9 09K OHM 1 0 125W 91637 MFF1816G90900F A05R064 311 1741 00 RES VAR NONWIR TRMR 2K OHM 20 0 5W 0000M 311 1741 00 A05R066 321 0287 00 RES FXD FILM 9 53K OH...

Page 464: ...A05U026 160 1897 01 MICROCIRCUIT DI 8K BYTE EPROM PRGM 0000M 160 1897 01 A05U045 156 1111 00 300101 300280 MICROCIRCUIT DI OCTAL BUS TRANSCEIVERS 01295 SN74LS245N3 A05U045 318 ONLY A05U045 156 1111 02 300281 MICROCIRCUIT DI OCTAL BUS TRANSCEIVERS 01295 SN74LS245 N30RJ4 A05U045 318 ONLY A05U045 156 1111 00 300101 300150 MICROCIRCUIT DI OCTAL BUS TRANSCEIVERS 01295 SN74LS245N3 A05U045 338 ONLY A05U0...

Page 465: ...91 02 300151 MICROCIRCUIT DI HEX LATCH W CLEAR 01295 SN74LS174 A05U100 338 ONLY A05U105 156 1770 00 MICROCIRCUIT DI OCTAL D TYPE W CLEAR 0000M 156 1770 00 A05U110 156 0514 03 MICROCIRCUIT DI DIFF 4 CHANNEL MUX 0000M 156 0514 03 A05U111 156 0514 03 MICROCIRCUIT DI DIFF 4 CHANNEL MUX 0000M 156 0514 03 A05U112 156 0514 03 MICROCIRCUIT DI DIFF 4 CHANNEL MUX 0000M 156 0514 03 A05U113 156 0514 03 MICROC...

Page 466: ...0M 150 1081 00 A06GND001 214 0579 00 TERM TEST POINT BRS CD PL 80009 214 0579 00 A06GND002 214 0579 00 TERM TEST POINT BRS CD PL 80009 214 0579 00 A060550 151 0190 00 TRANSISTOR NPN SI TO 92 04713 SPS7969 A06R100 315 0181 00 RES FXD CMPSN 180 OHM 5 0 25W 57668 NTR25J E180E A06R101 315 0271 00 RES FXD CMPSN 270 OHM 5 0 25W 01121 CB2715 A06R102 315 0242 00 RES FXD CMPSN 2 4K OHM 5 0 25W 57668 NTR25J...

Page 467: ... MICROCIRCUIT DI DIVIDE BY 12 COUNTER SCRN 01295 SN74LS92 NP3 OR A06U110 318 ONLY A06U110 156 1108 00 300101 300150 MICROCIRCUIT DI DIVIDE BY 12 COUNTER SCRN 01295 SN74LS92 A06U110 338 ONLY A06U110 156 1108 02 300151 MICROCIRCUIT DI DIVIDE BY 12 COUNTER SCRN 01295 SN74LS92 NP3 OR A06U110 338 ONLY A06U120 156 0910 00 300101 300280 MICROCIRCUIT DI DUAL DECADE COUNTER SCRN 01295 SN74LS390 A06U120 318...

Page 468: ...0000M 156 1781 00 A06U401 156 1781 00 MICROCIRCUIT DI 2K BYTE RAM 0000M 156 1781 00 A06U500 156 1776 00 MICROCIRCUIT DI DISPLAY CONTROLLER 000CM 156 1776 00 A06U505 156 0382 00 300101 300280 MICROCIRCUIT DI QUAD 2 INP NAND GATE 01295 SN74LS00NP3 A06U505 318 ONLY A06U505 156 0382 02 300281 MICROCIRCUIT DI QUAD 2 lNP NAND GATE 01295 SN74LS00 A06U505 318 ONLY A06U505 156 0382 00 300101 300150 MICROCI...

Page 469: ...UMMY RES 2 375 22 AWG 57668 JWW 0200E0 A06Y105 158 0268 00 300126 XTAL UNIT QTZ 10 227MHZ 20 PAR 0000M 158 0268 00 A06Y105 318 ONLY A06Y105 158 0268 00 XTAL UNIT QTZ 10 227MHZ 20 PAR 0000M 158 0268 00 A06Y105 338 ONLY A06Y115 158 0267 00 300126 XTAL UNIT QTZ 14 746MHZ 20 PAR 0000M 158 0267 00 A06Y115 318 ONLY A06Y115 158 0267 00 XTAL UNIT QTZ 14 746MHZ 20 PAR 0000M 158 0267 00 A06Y115 338 ONLY 8 3...

Page 470: ... DEVICE SIG SI BAX13 T0191 152 0327 00 A07J100 131 2942 01 CONN RCPT ELEC HEADER ANGLE 2 X 13 0000M 131 2942 01 A07Q120 151 0188 00 TRANSISTOR PNP SI TO 92 T0058 2N3906 A07Q140 151 0188 00 TRANSISTOR PNP SI TO 92 T0058 2N3906 A07Q141 151 0190 00 TRANSISTOR NPN SI TO 92 04713 SPS7969 A07Q150 151 0190 00 TRANSISTOR NPN SI TO 92 04713 SPS7969 A07Q170 151 0188 00 TRANSISTOR PNP SI TO 92 T0058 2N3906 A...

Page 471: ...5 318 ONLY A07U005 156 0850 02 300281 MICROCIRCUIT DI PRGM BIT RATE GEN SCRN 07263 4702BDCQR A07U005 318 ONLY A07U005 156 0850 00 300101 300150 MICROCIRCUIT DI PRGM BIT RATE GEN SCRN 07263 4702BDCQR A07U005 338 ONLY A07U005 156 0850 02 300151 MICROCIRCUIT DI PRGM BIT RATE GEN SCRN 07263 4702BDCQR A07U005 338 ONLY A07U006 156 0850 00 300101 300280 MICROCIRCUIT DI PRGM BIT RATE GEN SCRN 07263 4702BD...

Page 472: ...MICROCIRCUIT DI OCTAL BUS TRANSCEIVERS 01295 SN74LS245N3 A07U025 338 ONLY A07U025 156 1111 02 300151 MICROCIRCUIT DI OCTAL BUS TRANSCEIVERS 01295 SN74LS245 N30RJ4 A07U025 338 ONLY __ A07U030 156 0469 00 300101 300280 MICROCIRCUIT DI 3 8 LINE DCDR SCRN 01295 SN74LS138 A07U030 318 ONLY A07U030 156 0469 02 300281 MICROCIRCUIT DI 3 8 LINE DCDR 01295 SN74LS138NP3 A07U030 318 ONLY A07U030 156 0469 00 30...

Page 473: ...AL AMPL 27014 LF356N A A07U110 156 1126 02 MICROCIRCUIT LI COMPARATOR SINGLE W STROBE 0000M 156 1126 02 A07U111 156 1126 02 MICROCIRCUIT LI COMPARATOR SINGLE W STROBE 0000M 156 1126 02 A07U120 156 1126 02 MICROCIRCUIT LI COMPARATOR SINGLE W STROBE 0000M 156 1126 02 A07VR100 152 0813 00 SEMICOND DEVICE ZENER SI 3 0V 5 5W 0000M 152 0813 00 A07W100 175 0142 00 CA ASSY SP ELEC 26 AWG 20CM 0000M 175 01...

Page 474: ... 318 ONLY A08J004 131 3065 00 CONN RCPT ELEC EDGE CARD 50 FEMALE 0000M 131 3065 00 A08J004 338 ONLY A08J005 131 3065 00 300126 CONN RCPT ELEC EDGE CARD 50 FEMALE 0000M 131 3065 00 A08J005 318 ONLY A08J005 131 3065 00 CONN RCPT ELEC EDGE CARD 50 FEMALE 0000M 131 3065 00 A08J005 338 ONLY A08J006 131 3065 00 300126 CONN RCPT ELEC EDGE CARD 50 FEMALE 0000M 131 3065 00 A08J006 318 ONLY A08J006 131 3065...

Page 475: ...Description Code Mfr Part Number A09 260 2133 00 SWITCH PB ASSY KEYBOARD 80009 260 2133 00 A09DS010 150 1057 00 LT EMITTING DIO GREEN 20MA 0000M 150 1057 00 A09J010 131 2230 01 CONN RCPT ELEC HEADER 2 X 8 2 54 SPACING A09R010 316 0331 00 RES FXD CMPSN 330 OHM 10 0 25W 01121 CB3311 A09R020 PART NUMBER NOT AVLBL AT THIS PRINTING 8 37 ...

Page 476: ...AA A10C290 290 0862 00 CAP FXD ELCTLT 470UF 30 10 10V 0000M 290 0862 00 A10CR220 152 0327 00 SEMICOND DEVICE SIG SI BAX13 T0191 152 0327 00 A10CR230 152 0414 00 SEMICOND DEVICE SILICON 200V 0 75A 12969 UTR308 A10CR240 152 0776 00 SEMICOND DEVICE SILICON 600V 800MA 0000M 152 0776 00 A10CR250 152 0776 00 SEMICOND DEVICE SILICON 600V 800MA 0000M 152 0776 00 A10GND001 214 0579 00 TERM TEST POINT BRS C...

Page 477: ... 311 1618 00 A10R250 315 0303 00 RES FXD CMPSN 30K OHM 5 0 25W 01121 CB3035 A10R253 315 0205 00 300101 300374 RES FXD CMPSN 2M OHM 5 0 25W 01121 CB2055 A10R253 318 ONLY A10R253 315 0105 00 300375 RES FXD CMPSN 1M OHM 5 0 25W 01121 CB1055 A10R253 318 ONLY A10R253 315 0205 00 300101 300244 RES FXD CMPSN 2M OHM 5 0 25W 01121 CB2055 A10R253 338 ONLY A10R253 315 0105 00 300245 RES FXD CMPSN 1M OHM 5 0 ...

Page 478: ...33 03 SEMICOND DEVICE SILICON 50V 200MA 0000M 152 0333 03 A11CR138 152 0333 03 SEMICOND DEVICE SILICON 50V 200MA 0000M 152 0333 03 A11CR142 152 0333 03 SEMICOND DEVICE SILICON 50V 200MA 0000M 152 0333 03 A11CR145 152 0603 00 SEMICOND DEVICE RECT SI 1KV 1A 0000M 152 0603 00 A11CR146 152 0333 03 SEMICOND DEVICE SILICON 50V 200MA 0000M 152 0333 03 A11CR147 152 0333 03 SEMICOND DEVICE SILICON 50V 200M...

Page 479: ...0 A11R143 315 0682 00 RES FXD CMPSN 6 8K OHM 5 0 25W 57668 NTR25J E06K8 A11R145 301 0100 00 RES FXD CMPSN 10 OHM 5 0 50W 01121 EB1005 A11R147 307 0040 00 RES FXD CMPSN 4 7 OHM 5 1W 0000M 307 0040 00 A11R149 303 0220 00 RES FXD CMPSN 22 OHM 5 1W 01121 GB2205 A11R151 301 0100 00 RES FXD CMPSN 10 OHM 5 0 50W 01121 EB1005 A11R152 301 0100 00 RES FXD CMPSN 10 OHM 5 0 50W 01121 EB1005 A11R154 301 0100 0...

Page 480: ...V 0000M 285 1276 00 A12C073 283 0497 00 CAP FXD CER DI 0 047UF 20 25V 0000M 283 0497 00 A12C074 290 1000 00 CAP FXD ELCTLT 330UF 20 10V 0000M 290 1000 00 A12C075 290 1000 00 CAP FXD ELCTLT 330UF 20 10V 0000M 290 1000 00 A12C076 285 1267 00 CAP FXD MTLZD 1 UF 10 100V 0000M 285 1267 00 A12C077 285 1267 00 CAP FXD MTLZD 1 UF 10 100V 0000M 285 1267 00 A12C078 283 0499 00 CAP FXD CER DI 220PF 10 1KV 00...

Page 481: ...EMICOND DEVICE RECT SI 600V 0 5A 0000M 152 0586 02 A12CR092 152 0586 02 SEMICOND DEVICE RECT SI 600V 0 5A 0000M 152 0586 02 A12FL001 119 0420 03 FILTER RFI 3A 250VAC 400HZ 0000M 119 0420 03 A12J001 131 2984 00 CONN RCPT ELEC CONTACT 15 MALE 0000M 131 2984 00 A12J002 131 2988 00 CONN RCPT ELEC 2 MALE CONTACT 0000M 131 2988 00 A12J003 131 2988 00 CONN RCPT ELEC 2 MALE CONTACT 0000M 131 2988 00 A12J0...

Page 482: ... RES FXD FILM 10K OHM 1 0 25W 0000M 322 0289 01 A12R030 315 0472 00 RES FXD CMPSN 4 7K OHM 5 0 25W 57668 NTR25J E04K7 A12R031 315 0472 00 RES FXD CMPSN 4 7K OHM 5 0 25W 57668 NTR25J E04K7 A12R032 315 0272 00 RES FXD CMPSN 2 7K OHM 5 0 25W 57668 NTR25J E02K7 A12R033 315 0102 00 RES FXD CMPSN 1K OHM 5 0 25W 57668 NTR25JE01K0 A12R034 315 0681 00 RES FXD CMPSN 680 OHM 5 0 25W 57668 NTR25J E680E A12R03...

Page 483: ... 57668 NTR25J E02K2 A12R084 315 0102 00 RES FXD CMPSN 1K OHM 5 0 25W 57668 NTR25JE01K0 A12R085 308 0848 00 RES FXD WW 7M OHM 10 0000M 308 0848 00 A12R086 308 0848 00 RES FXD WW 7M OHM 10 0000M 308 0848 00 A12R087 315 0470 00 RES FXD CMPSN 47 OHM 5 0 25W 57668 NTR25J E47E0 A12R088 315 0121 00 RES FXD CMPSN 120 OHM 5 0 25W 01121 CB1215 A12R091 307 0659 00 RES FXD FILM 2 2 OHM 5 0 25W 19701 5043CX2R2...

Page 484: ...R041 152 0821 00 SEMICOND DEVICE ZEN SI 6 8V 5 0 4W 0000M 152 0821 00 A12VR042 152 0724 01 SEMICOND DEVICE ZEN SI 4 7V 5 0 4W 0000M 152 0724 01 A12VR043 152 0820 00 SEMICOND DEVICE ZEN SI 13V 5 0 4W 0000M 152 0820 00 A12VR044 152 0175 02 SEMICOND DEVICE ZEN SI 15 6V 5 0 4W 0000M 152 0175 02 A12VR045 152 0822 00 SEMICOND DEVICE ZEN SI 18V 5 0 4W 0000M 152 0822 00 A12VR046 152 0306 02 SEMICOND DEVIC...

Page 485: ...20 03 300101 300598 FILTER RFI 3A 250VAC 400HZ 0000M 119 0420 03 FL1 318 ONLY FL1 119 1536 00 300599 FILTER RFI 3A 250VAC 50 60 HZ 54583 ZUB2203 000 FL1 318 ONLY FL1 119 0420 03 300101 300490 FILTER RFI 3A 250VAC 400HZ 0000M 119 0420 03 FL1 338 ONLY FL1 119 1536 00 300491 FILTER RFI 3A 250VAC 50 60 HZ 54583 ZUB2203 000 FL1 338 ONLY L150 119 1059 00 COIL TUBE DEFL FIXED DEFLECTION YOKE 0000M 119 10...

Page 486: ...lues one or greater are in picofarads pF Values less than one are in microfarads µ F Resistors Ohms Ω The information and special symbols below may appear in this manual Assembly Numbers and Grid Coordinates Each assembly in the instrument is assigned an assembly number e g A20 The assembly number appears on the circuit board outline on the diagram in the title for the circuit board component loca...

Page 487: ...0 10 10173 16 8 74LS390 16 8 10176 1 16 8 74LS393 14 7 10197 1 16 8 AD7524 14 3 10211 1 15 16 8 HD44007A 24 12 10231 1 16 8 HM10422 1 24 12 10422 1 24 12 HM6116P 24 12 1488 1 14 7 HN613128P 28 14 1489 14 7 LF356 7 2332 24 12 LSI A 69 71 75 70 73 2764 28 14 77 3 3V 76 79 40H000 14 7 LSI B 69 71 75 70 73 40H020 14 7 77 3 3V 76 79 40H174 16 8 M218 13 4 40H244 20 10 MB62110 47 40 54 40H273 20 10 MBM10...

Page 488: ...ation as the item it mounts while the detail parts are indented to the right indented Items are part of and included with the next higher indentation The separation symbol indicates the end of attaching parts Attaching parts must be purchased separately unless otherwise specified ABBREVIATIONS INCH ELCTRN ELECTRON IN NCH SE SINGLE END NUMBER SIZE ELEC ELECTRPICA INCAND NCANDESCENT SECT SECTION ACT...

Page 489: ...2526 BERG ELECTRONICS INC YOUK EXPRESSWAY NEW CUMBERLAND PA 17070 24931 SPECIALITY CONNECTOR CO INC 2620 ENDRESS PLACE GREENWOOD IN 46142 70903 BELDEN CORP 2000 S BATAVIA AVENUE GENEVA IL 60134 71279 CAMBRIDGE THERMIONIC CORP 445 CONCORD AVE CAMBRIDGE MA 02138 73743 FISCHER SPECIAL MFG CO 446 MORGAN ST CINCINNATI OH 45206 78189 ILLINOIS TOOL WORKS INC SHAKEPROOF DIVISION ST CHARLES ROAD ELGIN IL 6...

Page 490: ...REW MACHINE 6 32 X 0 188 INCH PNH STL 83385 ORD BY DESCR END ATTACHING PARTS 4 348 0080 01 4 FOOT CABINET BOTTOM 80009 348 0080 01 5 334 4913 00 1 PLATE IDENT 318 LOGIC ANALYZER 0000M 3344913 00 318 ONLY 334 4914 00 1 PLATE IDENT 338 LOGIC ANALYZER 0000M 334 4914 00 338 ONLY 6 200 1342 01 2 COVER HANDLE 35 5MM OD X 14MM H PLASTIC 0000M 200 1342 01 7 386 3936 00 2 PLATE MOUNTING HANDLE STEEL 0000M ...

Page 491: ...UBBER RIGHT 0000M 348 0818 00 318 ONLY 348 0818 00 300491 1 CUSHION RUBBER RIGHT 0000M 348 0818 00 338 ONLY 348 0817 00 300561 1 CUSHION RUBBER LEFT 0000M 348 0817 00 318 ONLY 348 0817 00 300491 1 CUSHION RUBBER LEFT 0000M 348 0817 00 338 ONLY ATTACHING PARTS 6 211 0661 00 2 SCREW MACHINE 4 40 X 0 25 INCH PNH STL 78189 ORD BY DESCR END ATTACHING PARTS 7 337 2600 00 1 SHIELD CRT 0000M 337 2600 00 8...

Page 492: ...00280 1 CHAS LGC ANALY LEFT 318 338 0000M 441 1662 00 318 ONLY 441 1662 01 300281 1 CHAS LGC ANALY LEFT 318 338 0000M 441 1662 01 318 ONLY 441 1662 00 300101 300145 1 CHAS LGC ANALY LEFT 318 338 0000M 441 1662 00 338 ONLY 441 1662 01 300146 1 CHAS LGC ANALY LEFT 318 338 0000M 441 1662 01 338 ONLY ATTACHING PARTS 26 211 0105 00 5 SCREW MACHINE 4 40 X 0 188 100 DEG FLH S 83385 ORD BY DESCR END ATTAC...

Page 493: ...00 63 175 0142 00 1 CA ASSY SP ELEC 26 28 AWG 20CM 0000M 175 0142 00 64 198 5295 00 1 WIRE SET ELEC 0000M 198 5295 00 65 352 0169 00 1 HLDR TERM CONN 2 WIRE BLACK 80009 352 0169 00 66 198 5298 00 1 WIRE SET ELEC 0000M 198 5298 00 OPTION 01 ONLY 67 352 0169 00 1 HLDR TERM CONN 2 WIRE BLACK 80009 352 0169 00 OPTION 01 ONLY 68 1 CKT BOARD ASSY CRT SEE A10 REPL ATTACHING PARTS 69 211 0661 00 3 SCREW M...

Page 494: ...00 2 TERMINAL PIN 0 46 L X 0 025 SO 22526 48283 029 103 1 CONNECTOR SEE A02J200 OR J210 REPL 104 131 0993 00 2 BUS CONDUCTOR 2 WIRE BLACK 00779 850100 01 105 1 CONNECTOR SEE A02J206 OR J220 REPL 106 361 0955 00 1 SPACER CONN 0 433 THK POLYCARBONATE 0000M 361 0955 00 318 ONLY 361 0955 00 2 SPACER CONN 0 433 THK POLYCARBONATE 0000M 361 0955 00 338 ONLY 107 4 CONNECTOR SEE A02J200 J202 J204 J206 REP ...

Page 495: ...PL 132 2 TEST POINT SEE A06GND 1 2 REPL 133 136 0623 00 300101 300330 1 SOCKET PLUG IN 40 DIP LOW PROFILE 09922 DILB40P 108 318 ONLY 136 0623 00 300101 300200 1 SOCKET PLUG IN 40 DIP LOW PROFILE 09922 DILB40P 108 338 ONLY 134 131 0608 00 7 TERMINAL PIN 0 365 L X 0 025 PH BRZ GOLD 22526 48283 036 135 131 0993 00 2 BUS CONDUCTOR 2 WIRE BLACK 00779 850100 01 136 1 CKT BOARD ASSY SERIRS232C NVM SEE A0...

Page 496: ...M 200 2820 00 15 1 FAN ASSY SEE B1 REPL ATTACHING PARTS 16 211 0020 00 4 SCREW MACHINE 4 40 X 1 125 INCH PNH STL 83385 ORD BY DESCR 17 210 0004 00 4 WASHER LOCK 4 INTL 0 015 THK STL CD PL 000BK ORD BY DESCR END ATTACHING PARTS FAN ASSY INCLUDES 18 352 0371 00 1 HLDR TERM CONN 2 FEMALE 000 M 352 0371 00 19 200 2822 00 1 COVER PWR SPLY BOTTOM ALUMINUM 0000M 200 2822 00 ATTACHING PARTS 20 211 0105 00...

Page 497: ... X 0 25 INCH PNH STL 78189 ORD BY DESCR END ATTACHING PARTS 46 214 2064 00 1 HEAT SINK XSTR TO 218 ALUMINUM 0000M 214 2064 00 ATTACHING PARTS 47 211 0661 00 2 SCREW MACHINE 4 40 X 0 25 INCH PNH STL 78189 ORD BY DESCR END ATTACHING PARTS 48 3 CONNECTOR SEE A11J4 J5 J11 REPL 49 2 CONNECTOR SEE A11J8 J10 REPL 50 1 CKT BOARD ASSY REGULATOR SEE A12 REPL ATTACHING PARTS 51 211 0661 00 4 SCREW MACHINE 4 ...

Page 498: ...BLE ASSY PWR 3 X 0 75MM SQ 220V 98 0L S3109 ORD BY DESCR OPTION A1 EUROPEAN ONLY 6 161 0104 07 1 CABLE ASSY PWR 3 X 0 75MM SQ 240V 98 0 L S3109 ORD BY DESCR OPTION A2 UNITED KINGDOM ONLY 7 161 0104 05 1 CABLE ASSY PWR 3 18 AWG 240V 98 0 L S3109 ORD BY DESCR OPTION A3 AUSTALIAN ONLY 8 161 0104 08 1 CABLE ASSY PWR 3 18 AWG 240V 98 0 L Tl105 ORD BY DESCR OPTION A4 NORTH AMERICAN ONLY 9 161 0154 00 1 ...

Page 499: ...aintenance Management System TAMMS TM 11 6625 3145 24P Organization Direct Support and General Support Maintenance including Depot Maintenance Repair Parts and Special Tools Lists for Logic Analyzer TEK Models 318 338 TM 7520 244 2 Procedures for Destruction of Electronics Materiel to Prevent Enemy Use Electronics Command A 1 A 2 blank ...

Page 500: ...ollows 1 Column A Figure Number Indicates the figure number of the illustration on which the item is shown 2 Column B Item Number The number used to identify the item called out in the illustration b Column 2 National Stock Number Indicates the National Stock Number assigned to the item the number will be used for requisitioning c Column 3 Description Indicates the Federal item name and if require...

Page 501: ...is column lists the quantity of each item required for a complete major item g Column 7 Quantity This column is divided into two columns In the Received Rcvd column list the quantity actually received on your major item The Date column is left blank for later use during inventory of the major item B 2 ...

Page 502: ... 4 5 6 7 ILLUSTRATION QUANTITY A B NATIONAL DESCRIPTION USUABLE FIG ITEM STOCK ON QTY NO NO NUMBER PART NUMBER FSCM LOCATION CODE REQD RCVD DATE LOGIC ANALYZER TEKTRONIX MODEL 31851 FSCM 80009 DRSEL MA Form 6010 1 Mar 77 Edition of 1 Jun 76 is obsolete B 3 B 4 blank B 3 B 4 blank ...

Page 503: ...ng key when trying USE EXECUTE to select a field value The messages list the valid keys USE INCR DECR USE 0 1 X USE 0 7 X USE 0 9 X USE 0 F X USE A B X USE O D X SLOW CLOCK This messages appears when external clock interval is longer than 25 mS ST SETUP CHANGED These messages except ST NO ACQ appear when you ST NO ACQ press the STOP key during data acquisition ST NO ACQ ST NO TRIG appears when you...

Page 504: ...acteristics with established standards through examination b Test To verify serviceability and to detect incipient failure by measuring the mechanical or electrical characteristics of an item and comparing those characteristics with prescribed standards c Service Operations required periodically to keep an item in proper operating condition i e to clean decontaminate to preserve to drain to paint ...

Page 505: ...nning spare type items such as fuses lamps or electron tubes j Overhaul That maintenance effort service action necessary to restore an item to a completely serviceable operational condition as prescribed by maintenance standards i e DMWR in appropriate technical publications Overhaul is normally the highest degree of maintenance performed by the Army Overhaul does not normally return an item to li...

Page 506: ...enance function varies at different maintenance categories appropriate work time figures will be shown for each category The number of task hours specified by the work time figure represents the average time required to restore an item assembly subassembly components module end item or system to a serviceable condition under typical field operating conditions This time includes preparation time tr...

Page 507: ...equipment c Nomenclature This column lists the noun name and nomenclature of the tools and test functions d National NATO Stock Number This column lists the National NATO Stock Number of the specific tool or test equipment e Tool Number This column lists the manufacturer s Part Number of the tool and is followed by the Federal Supply Code for Manufacturers FSCM 5 digits in parentheses D 5 Section ...

Page 508: ...ROL CCA Inspect 0 1 670 7815 00 Test 3 0 A3 Replace 0 3 Repair 4 0 04 ACQ MEMORY CCA Inspect 0 1 670 7814 00 Test 3 0 A4 Replace 0 3 Repair 4 0 05 ROM THRESHOLD CCA Inspect 0 1 670 7813 00 Test 3 0 A5 Replace 0 3 Repair 4 0 06 MPU DISPLAY CCA Inspect 0 1 670 7812 00 Test 3 0 A6 Replace 0 3 Repair 4 0 07 SERIAL RS232 NUM Inspect 0 1 670 7809 00 Test 3 0 A7 Replace 0 3 Repair 4 0 08 MOTHER BOARD CCA...

Page 509: ... STOCK NUMBER NUMBER REF CODE 1 H DUAL TRACE OSCILLOSCOPE TEK475 OS261C U 80009 2 H POWER MODULE TM503 OS261C U 80009 3 H PULSE GENERATOR 6625 01 137 5369 SG 1205 U 4 H DIGITAL MULTIMETER 6625 01 145 2430 AN USM 486 5 H DIGITAL DELAY DD501 80009 6 H POWER SUPPLY PS501 80009 7 H MAINTENANCE KIT 067 1159 00 80009 8 COMPUTER TERMINAL 4025 80009 9 GENERATOR 834 80009 D 6 ...

Page 510: ...ION IV REMARKS REFERENCE REMARKS CODE A TEST AND REPAIR BY USATSG AT GENERAL SUPPORT LEVEL B CONSISTS OF REPLACEMENT OF CCA S SUBASSEMBLIES AND MAINFRAME COMPONENTS AS REQUIRED C ASSEMBLY A9 IS A THROW AWAY ITEM D 7 D 8 blank ...

Page 511: ...MAY BE DAMAGED 10 DISPLAY RAM E800 TO EFFF MAY BE DAMAGED 11 SYSTEM RAM FOOO TO FFFF MAY BE DAMAGED KBD SOME KEYS MAY BE DEPRESSED TIME BASE TIMER OR SOME OF SYSTEM CLOCK MAY BE DAMAGED T H SOME ERRORS ARE DETECTED IN V3 V1 V2 2 TEST WR THE WORD RECOGNIZER RAMS WRO AND WR1 MAY BE DAMAGED ACQ HIGH SPEED RAM MAY BE DAMAGED SQRAM SEQUENCER RAM MAY BE DAMAGED NDL EVENT DELAY CARRY FLAG IS NOT SET SEQ ...

Page 512: ...R1 OR CAN NOT READ DATA FROM SPEED RAM 30 CAN NOT WRITE 55H INTO HIGH SPEED RAM OR CAN NOT READ DATA FROM HIGH SPEED RAM 31 ADDRESS COUNTER CARRY FLAG IS NOT SET 32 CAN NOT WRITE OAAH INTO HIGH SPEED RAM OR READ DATA FROM HIGH SPEED RAM 33 ADDRESS COUNTER CARRY FLAG IS NOT SET 40 CAN NOT WRITE 55H INTO SQRAM OR CAN NOT READ DATA FROM HIGH SPEED DATA 41 CAN NOT WRITE OAAH INTO SQRAM OR CAN NOT READ...

Page 513: ...OT OFF B6 SERIAL ERROR REGISTER READ ERROR B7 SERIAL FRAMING ERR BIT NOT OFF B8 SERIAL OVER RUN ERR BIT NOT OFF B9 SERIAL PARITY ERR BIT NOT OFF BA EXT TRIG BIT NOT OFF BB EXT TRIG BIT NOT ON BC DATA LOOP BACK TEST ERROR AT 75 BAUD FROM RS232 OUTPUT TO SERIAL INPUT BD 200 BAUD BE 2400 BAUD BF 1800 BAUD C0 1200 BAUD C1 4800 BAUD C2 110 BAUD C3 9600 BAUD E 3 ...

Page 514: ...232 RECEIVE READY FLAG NOT OFF A0 RS232 TRANSMIT EMPTY FLAG NOT ON A2 RS232 ERROR REGISTER READ ERROR A3 RS232 FRAMING ERROR FLAG NOT OFF A4 RS232 OVER RUN ERROR FLAG NOT OFF A5 RS232 PARITY ERROR FLAG NOT OFF AA INCREMENT PATTERN DATA LOOP BACK TEST FROM RS232 OUTPUT TO RS232 INPUT ERROR AT 110 BAUD AB 150 BAUD AC 300 BAUD AD 600 BAUD AE 1200 BAUD AF 2400 BAUD B0 4800 BAUD B1 9600 BAUD B2 INTERRU...

Page 515: ...Table E 5 ERROR CODES OF NVM TESTS IN DIAGNOSTICS MENU Code Description C8 DATA ERROR WHEN DATA PATTERN IS FF C9 00 CA 01 CB 02 CC 04 CD 08 CE 10 CF 20 DO 40 D1 80 D2 MARCHING PATTERN D3 INCREMENTING PATTERN E 5 E 6 blank ...

Page 516: ...CKHAM JR General United States Army Official Chief of Staff DONALD J DELANDRO Brigadier General United States Army The Adjutant General Distribution To be distributed in accordance with special list U S GOVERNMENT PRINTING OFFICE 1985 515 085 20165 ...

Page 517: ...TM 11 6625 3145 14 318 338 4434 923 318 Block Diagram ...

Page 518: ...TM 11 6625 3145 14 318 338 4434 924 338 Block Diagram ...

Page 519: ...TM 11 6625 3145 14 318 338 4434 925 318 Acquisition Module Wiring Diagram ...

Page 520: ...TM 11 6625 3145 14 318 338 4434 926 318 338 Mainframe Wiring Diagram ...

Page 521: ...TM 11 6625 3145 14 318 338 4434 926 338 Acquisition Module Wiring Diagram ...

Page 522: ...TM 11 6625 3145 14 318 338 4434 928 Figure 9 1 318 A01 Input A Board Component Locations ...

Page 523: ... B2 R108D E1 C2 J100 Al C2 R108E E1 C2 J100 E4 C2 R108F E1 C2 J100 C1 C2 R108G E1 C2 J100 F2 C2 R108H E1 C2 R100A A3 C1 R122 E4 D2 R100B A2 C1 R152 Dl B1 R100C A2 C1 TP100 F5 Al R100D A3 C1 TP102 F5 C3 R100E A4 C1 TP106 E4 A3 R100OF A5 C1 TP108 B1 B1 R100G A4 C1 TP110 D4 C1 R100H A5 C1 U100 B2 A2 R102A C2 C2 U102 B3 Al R102B C4 C2 U104 B4 A2 R 102C C4 C2 U106 B5 B2 R102D C2 C2 U108 D2 B2 R102E C3 ...

Page 524: ...5 D1 C126 F1 E2 R128A E4 F2 C128 F1 B2 R128B E3 F2 C130 F1 A1 R128C E3 F2 C132 F1 B1 R128D E3 F2 C134 B5 A2 R128E E3 F2 C136 F1 A3 R128F E3 F2 C138 B5 A3 R128G E3 F2 C140 E4 F1 R130 E4 F1 C142 E4 F1 R136 E4 F1 CR110 F2 C2 R138 E4 F1 CR112 E2 C2 R140 D3 E2 CR114 F2 C2 R142 B5 C2 CR116 F2 C2 R146 B3 D1 CR118 B3 C1 R148 B3 B2 CR120 C2 C2 R150 E2 B3 CR122 C2 C2 R154 F3 F2 DL104 E2 B3 R156A F4 Fl J100 ...

Page 525: ...E3 C1 DL108D C5 A2 R212F D4 D2 J200 B5 C2 R212G D4 D2 J200 D3 C2 R266 E5 A1 J200 D2 C2 R270 F3 B3 J200 D4 C2 R312 F2 B3 J204 C1 D2 R314 C5 A2 J204 A1 D2 R138 E4 B3 R202A A2 A2 R326 A1 E2 R202B A2 A2 TP204 F4 F1 R202C A3 A2 TP206 F4 C1 R202D A3 A2 TP208 D2 A1 R202E A4 A2 U202 B2 B2 R202F A4 A2 U204 B2 B2 R202G A5 A2 U206 B3 A2 R202H A5 A2 U208 B4 A3 R204A C2 A2 U210 C2 B1 R204B C2 A2 U212 C3 B1 R20...

Page 526: ...TM 11 6625 3145 14 ...

Page 527: ...4 D1 C272 B4 F2 R262 F4 D1 C274 B5 F1 R268 D3 E2 C278 C4 F1 R300 F3 C1 C300 C5 F1 R302 F3 D1 CR200 C3 B3 R304 F2 D1 CR202 B4 F2 R306 F4 D1 CR204 B4 F2 R308 F4 E1 CR206 D5 C1 R310 F4 D1 DL110 D4 E1 R316 B5 F2 J200 A3 C2 R320 D2 F2 J200 B1 C2 R322 D5 C1 J200 E2 C2 R324 D5 C1 J200 E4 C2 R328 A5 E3 J200 E3 C2 R330 D3 C1 J200 E1 C2 R334 C5 F2 J202 E4 C2 R336 C4 F1 J202 F4 C2 R338 B4 F1 J202 A1 C2 R350 ...

Page 528: ...TM 11 6625 3145 14 Figure 9 3 318 338 A03 ACQ Control Board Component Locations ...

Page 529: ...0H C5 E1 R100C A1 D2 R160E F2 E1 R100D A1 D2 R160H F3 E1 R104A E2 E2 TP100 A1 E1 R104B E2 E2 TP200 F5 C1 R104C E2 E2 U100 B2 D2 R104 E2 E2 U103 C1 F1 R104E E2 E2 U104 D1 F2 R104F E2 E2 U106 C5 F2 R104G E2 E2 U108 E5 F2 R104H E2 E2 U114A F2 E2 R106A E3 E2 U114B F2 E2 R106B E3 E2 U114C F3 E2 R106C E3 E2 U116A F2 E2 R106D E3 E2 U116B F2 E2 R106E E3 E2 U116C F3 E2 R106F E3 E2 U118A F4 E2 R106G E3 E2 U...

Page 530: ...6 F4 B2 R126 F4 B2 C228 F4 C1 R130 D2 C1 C230 F4 A1 R132 E3 C1 C232 F5 E2 R134 E2 C1 C234 F5 E2 R136 C2 C1 C236 F5 A2 R160C B1 E1 C238 F5 C2 R160D B3 E1 C240 F5 B1 R160F B5 E1 C242 F5 A1 R180D A1 B2 C244 F5 E2 R180E C4 B2 C246 F5 B3 R180E C5 B2 C300 F4 D1 R180G C5 B2 C330 F5 B2 TP300 C1 E1 C332 F5 C2 TP400 E2 C1 C334 F5 D2 U110 B5 E1 C336 F5 E1 U112 C5 F1 C338 F5 C2 U122D B1 C1 C360 F3 B3 U124D A2...

Page 531: ...R102G B2 C2 U118C D1 E2 R102H B1 C2 U122A B2 C1 R108A F3 C2 U122B B2 C1 R108B F4 C2 U122C F2 C1 R108H F2 C2 U134A C5 C2 R110F D2 E1 U136A C4 B1 R112E E1 D2 U136B C4 B1 R112F B2 D2 U138A C3 B1 R114A D4 A2 U138B C3 B1 R114B D4 A2 U140 C3 A2 R114C D4 A2 U144 D2 B2 R114D D4 A2 U146 E2 C1 R116A C2 A2 U148A F2 B2 R116B C2 A2 U148B F3 B2 R116C C2 A2 U150A F3 B3 R116D C2 A2 U150B F4 B3 R116E C2 A2 U152A E...

Page 532: ...TM 11 6625 3145 14 ...

Page 533: ...110 D4 D1 R100 B2 D1 TP111 E4 A1 R102 B2 D1 TP200 E3 F1 R104 B3 C1 U114 E4 E2 R106 B3 B1 U116 B2 D1 R108 B4 A1 U118 B3 D1 R118C E5 E2 U120 C2 D1 R118D E4 E2 U122 C3 C1 R118E E4 E2 U124 D2 C1 R118F E4 E2 U126 D3 C1 R118G E4 E2 U128 E2 B1 R118H E4 E2 U130 E3 B1 R127 F2 A1 U132 F2 B1 R128 B4 E2 U134 F3 A1 R129 B4 E2 U136 B4 E1 R130 C4 A1 U138 B5 E1 R131 B5 E2 U139A B5 E1 R132 B5 E2 W118 E5 F2 R133 C5...

Page 534: ...118 F2 E3 R144D E2 D2 C120 F1 B2 R144E E3 D2 C122 F1 E3 R144F E3 D2 C124 F1 F2 R144G E3 D2 C126 F1 D2 R144H E3 D2 C128 F1 A2 R146 E4 A2 C132 F1 B2 TP200 F4 F1 C134 F1 A2 U100 A2 C2 J100 C2 E1 U102 A3 C2 J100 D3 E1 U104 A4 B1 J100 D4 E1 U106 A4 B1 J100 C3 E1 U108 A5 B1 L100 A1 E2 U110 B5 A2 R110 A2 C2 U112A B1 E2 R112A B5 B2 U112B B1 E2 R112B B5 B2 U112C B2 E2 R112C B5 B2 U112D F4 E2 R112D B5 B2 U1...

Page 535: ...CR80 C5 E1 U026 F1 D1 CR82 D5 E1 U045 A4 B2 J26 F1 D1 U050A B3 C2 P26 F1 Harmonica U050B B4 C2 to J26 U050C B4 C2 R026 F1 D1 U070 C3 D1 R060 B4 F1 U075A D3 E1 R062 B4 F1 U074B D3 E1 R064 B4 F1 U080 C5 E1 R066 B4 F1 U085A D5 F1 R068 C4 F1 U085B D5 F1 R069 C4 F1 U090A C4 D2 R070 D3 E1 U090B D3 D2 R072 D3 E1 U092A D4 D2 R074 C3 E1 U092B D4 D2 R076 C4 E1 U100 E3 E2 R078 C4 E1 U105 E5 D2 R080 D5 E1 U10...

Page 536: ...TM 11 6625 3145 14 ...

Page 537: ...1 P202 A5 Harmonica U210 A3 F2 to J202 U212 A4 D2 Q550 F2 D1 U214 B5 E2 R100 A1 A1 U216 F4 F2 R101 B1 A1 U220 B4 D2 R102 A1 A1 U230 F5 E2 R103 B1 A1 U300 E4 C2 R110 A2 A2 U310 D4 C2 R111 B2 A2 U320 D4 D2 R112 A2 A2 U400 B3 F1 R113 B2 A2 U401 C3 F1 R120 B2 A2 U500 F1 B2 R130 C2 A2 U505A D2 C1 R132 C2 A2 U505B E2 C1 R200 A5 E1 U505C F2 C1 R203 A5 E1 U505D E2 C1 R215 A3 E2 U510 D2 B1 R216 A3 E2 U515 ...

Page 538: ...TM 11 6625 3145 14 ...

Page 539: ...TM 11 6625 3145 14 ...

Page 540: ...TM 11 6625 3145 14 ...

Page 541: ...TM 11 6625 3145 14 ...

Page 542: ...TM 11 6625 3145 14 Figure 9 8 318 338 A10 CRT Board Component Locations ...

Page 543: ...1 R110 B4 C1 C235 C4 C1 R112 B3 C2 C240 D4 B1 R116 B3 D2 C245 D4 B2 R120 B4 C2 C250 D5 B2 R122 B4 C1 C270 B3 E1 R124 B4 C1 C275 B3 E1 R130 C4 C1 C280 B3 E1 R135 C4 D1 C285 B3 E1 R140 D3 C2 C290 C4 C1 R200 B5 C2 CR220 B5 B1 R202 B5 C2 CR230 C5 A2 R210 B5 C2 CR240 D4 B2 R240 D4 B2 CR250 D5 B2 R245 D4 C2 J001 A2 C2 R247 E4 B2 J040 D1 C2 R250 D5 B2 J100 D3 B2 R253 E5 B2 L116 B4 C2 R255 E5 B2 L140 C4 B...

Page 544: ...TM 11 6625 3145 14 Figure 9 9 318 338 A11 Inverter Board component Locations ...

Page 545: ...2 D1 C156 F4 C3 R131 C2 D2 CR101 A2 A1 R132 B3 D2 CR123 E2 D1 R134 C3 D3 CR125 E2 D1 R135 C4 D3 CR135 C4 D3 R137 C3 D3 CR136 C4 D3 R138 C5 D3 CR137 C4 D3 R139 D4 D3 CR138 C5 D3 R140 D4 D3 CR142 D5 D3 R141 D5 D3 CR145 D3 D2 R142 D5 D3 CR146 D3 E2 R143 D5 D3 CR147 E5 D3 R145 D3 D2 CR148 D3 E2 R147 D4 D2 CR149 D2 D2 R149 D3 E2 CR151 F2 C2 R151 F2 C2 CR152 F3 B3 R152 F3 C3 CR153 F3 B3 R154 F4 C3 CR154...

Page 546: ...TM 11 6625 3145 14 Figure 9 10 318 338 A12 Regulator Board Component Locations ...

Page 547: ... E3 D1 C88 F4 D3 R2 D1 C2 R82 E3 D1 C89 F4 C3 R20 B2 A2 R83 E3 D1 C9 F2 A2 R21 B2 A2 R84 F3 D1 C90 F4 D3 R22 B2 A1 R85 D4 B1 C91 E4 D2 R23 A2 A1 R86 D4 C1 C92 E5 E2 R24 B2 A1 R87 E4 C3 C93 F4 D2 R25 B2 A1 R88 F4 D3 C94 F5 D3 R26 B2 A1 R9 F2 A2 C95 F4 D3 R27 A2 A1 R91 E4 C1 C96 F5 D3 R28 B2 A2 R92 E5 C1 C97 F4 D3 R29 B2 A1 R93 F4 D3 C98 F5 D3 R3 El C2 R94 F5 D3 C99 F5 D3 R30 C3 A1 RT65 F5 C1 CR1 D1...

Page 548: ...TN 11 6625 3145 14 Figure 9 11 318S1 338S1 A07 Serial RS232 Non Volatile Memory Board Component Locations ...

Page 549: ...4 B1 R40 D4 A1 C311 F4 B1 R41 D4 A1 C320 E2 A1 R45 D5 A1 C321 E2 A2 R46 D5 A1 CR10 B4 C1 R50A E2 B1 CR11 B5 C1 R50E D5 B1 CR120 C1 E2 R60 C3 D2 CR130 C2 E2 R61 C4 D2 CR170 D1 E2 R70A B4 D2 J101 A4 C1 R70B B4 D2 J200 A4 BNC to side R70C B3 D2 panel R70C B4 D2 Q120 B1 E2 R70E B3 D2 Q140 C1 E2 TP10 C5 B1 Q141 C1 E2 TP100 B1 D1 Q150 C2 D1 TP101 C1 D1 Q170 D1 E2 TP11 C5 A1 R10 B5 C1 TP200 F4 B1 R100 A1...

Page 550: ... F5 B2 U22A D2 B2 J100 F4 C1 U22B F4 B2 R50C E3 B1 U25 B1 D2 U12A D4 B2 U30 C3 C2 U12B F3 B2 U31 D1 C2 U12C F3 B2 U32A F4 B2 U12D F2 B2 U32B F3 B2 U13A B2 C2 U32E F4 B2 U13B E2 C2 U40A F4 B2 U13C E2 C2 U40B F5 B2 U13D B3 C2 U40C F5 B2 U2 D4 A2 U40D F4 B2 U20A E1 C2 U41B E5 A1 U20B A2 C2 U41C E5 A1 U20C A2 C2 U41D E5 A1 U20E A2 C2 U45 D2 C2 U20F A2 C2 U5 E2 B2 U21A B2 C2 U6 E1 B2 U21B B3 C2 W100 F4...

Page 551: ...TM 11 6625 3145 14 Figure 9 12 338 A01 Input A Board Component Locations ...

Page 552: ...BER LOCATION LOCATION DL100 B2 A1 TP100 B3 B1 DL102 B3 A1 TP140 A2 A1 DL104 B4 C1 TP150 A4 B1 DL106 B4 B1 TP160 D3 B1 DL108 D2 B1 U100 B2 A2 J100 E3 D1 U102 B3 A2 J100 A2 D1 U104 B4 C2 J100 C2 D1 U106 B4 B2 R106 B5 A1 U108 D2 B2 R110 D4 D2 U110 D3 B2 R130 E2 B2 U112 D4 D2 R138 C2 A2 U114 D4 D2 R140 C4 B2 U118 F2 B3 R142 F2 B3 U120 F3 B3 R144 B5 A2 U122 F4 A3 ...

Page 553: ...TM 11 6625 3145 14 318 338 SERVICE ...

Page 554: ......

Page 555: ...PIN 058584 ...

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