Analog-to-digital converters (ADC)
RM0365
363/1080
DocID025202 Rev 7
15.5.4 ADC
configuration
register (ADCx_CFGR, x=1
..
2)
Address offset: 0x0C
Reset value: 0x0000 00000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Res.
AWD1CH[4:0]
JAUTO
JAWD1
EN
AWD1
EN
AWD1S
GL
JQM
JDISC
EN
DISCNUM[2:0]
DISC
EN
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Res.
AUT
DLY
CONT
OVR
MOD
EXTEN[1:0]
EXTSEL[3:0]
ALIGN
RES[1:0]
Res.
DMA
CFG
DMA
EN
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Bit 31 Reserved, must be kept at reset value.
Bits 30:26
AWD1CH[4:0]
: Analog watchdog 1 channel selection
These bits are set and cleared by software. They select the input channel to be guarded by the analog
watchdog.
00000: reserved (analog input channel 0 is not mapped)
00001: ADC analog input channel-1 monitored by AWD1
.....
10010: ADC analog input channel-18 monitored by AWD1
others: reserved, must not be used
Note: The channel selected by AWD1CH must be also selected into the SQRi or JSQRi registers.
Note: Software is allowed to write these bits only when ADSTART=0 and JADSTART=0 (which
ensures that no conversion is ongoing).
Bit 25
JAUTO:
Automatic injected group conversion
This bit is set and cleared by software to enable/disable automatic injected group conversion after
regular group conversion.
0: Automatic injected group conversion disabled
1: Automatic injected group conversion enabled
Note: Software is allowed to write this bit only when ADSTART=0 and JADSTART=0 (which ensures
that no regular nor injected conversion is ongoing).
Note: When dual mode is enabled (bits DUAL of ADCx_CCR register are not equal to zero), the bit
JAUTO of the slave ADC is no more writable and its content is equal to the bit JAUTO of the
master ADC.
Bit 24
JAWD1EN
: Analog watchdog 1 enable on injected channels
This bit is set and cleared by software
0: Analog watchdog 1 disabled on injected channels
1: Analog watchdog 1 enabled on injected channels
Note: Software is allowed to write this bit only when JADSTART=0 (which ensures that no injected
conversion is ongoing).
Bit 23
AWD1EN
: Analog watchdog 1 enable on regular channels
This bit is set and cleared by software
0: Analog watchdog 1 disabled on regular channels
1: Analog watchdog 1 enabled on regular channels
Note: Software is allowed to write this bit only when ADSTART=0 (which ensures that no regular
conversion is ongoing).