
2 Programming the Test Set
STATus Subsystem
Questionable Register
"Questionable Condition " on page 70
"Questionable Enable " on page 70
"Questionable Event Query " on page 71
"Questionable Negative Transition " on page 71
"Questionable Positive Transition" on page 71
Questionable Condition
This query returns the decimal value of the sum of the bits in the Questionable Condition register.
The data in this register is continuously updated and reflects the current conditions.
Mode
All
Remote Command
:STATus:QUEStionable:CONDition?
Example
STAT:QUES:COND?
Preset
0
Status Bits/OPC
dependencies
Sequential command
Initial S/W Revision
Prior to A.02.00
Questionable Enable
This command determines which bits in the Questionable Event register will set the Questionable Status
Summary bit (bit3) in the Status Byte Register. The variable <integer> is the sum of the decimal values of
the bits you want to enable.
The preset condition is all bits in this enable register set to 0. To have any Questionable Events reported to
the Status Byte Register, one or more bits need to be set to 1. The Status Byte Event Register should be
queried after each measurement to check the Questionable Status Summary (bit 3). If it is equal to 1, a
condition during the test may have made the test results invalid. If it is equal to 0, this indicates that no
hardware problem or measurement problem was detected by the analyzer.
Mode
All
Remote Command
:STATus:QUEStionable:ENABle <integer>
:STATus:QUEStionable:ENABle?
Example
STAT:OPER:PTR 1 Align Now operation beginning will be reported to the Status Byte Register.
Preset
0
Min
0
Max
32767
Status Bits/OPC
dependencies
Sequential command
70
Sequence Analyzer User's & Programmer's Reference