GE Multilin F650, Instruction Manual

Page: 261 / 1046

CHAPTER 5: SETPOINTS 5.5 CONTROL ELEMENTS
GEK-106310-AF F650 DIGITAL BAY CONTROLLER 5-109
Comparing the voltage values for line voltage (V1) and busbar voltage (V2) at both sides of the breaker, the relay can
determine the synchronism situation of the element (see Table 5-75: Synchronism conditions).
Being:
V
1
line voltage
V
2
bus voltage
V
L
Minimum acceptable voltage by setting to establish synchronism conditions (dead line and bus levels).
V
H
Appropriate voltage to establish synchronism conditions, configured by setting (live line and bus levels).
Table 5-75: Synchronism conditions
Table 5-75: Synchronism conditions shows the different synchrocheck and closing logic situations, that can be produced
depending on the line and busbar voltage levels.
Live Line – Live Bus (Synchronism check): Only in case number (2), with live line and live bus, the element starts evaluating
the line and busbar voltage comparison with respect to the setting DV
set
established
by setting (Max Volt Difference). In this case, if the voltage difference is lower than
DV
set
, the synchronism check element (25) verifies the angle difference Dj adjusted
by setting (Max Angle Difference).
Dead Line – Dead Bus (DL - DB): Case number (3) does not allow the synchronism function, but it does allow DL-DB
operation logic, if this logic is enabled by setting (DL-DB Function).
Dead Line – Live Bus (DL - LB): Case number (6) does not allow the synchronism function, but it does allow DL-LB
Operation logic, if this logic is enabled by setting (DL-LB Function)
Live Line – Dead Bus (LL - DB): Case number (7) does not allow the synchronism function, but it does allow LL-DB
operation logic, if this logic is enabled by setting (LL-DB Function)
Case numbers (1), (4) and (5) are not considered neither for synchronism check purposes, nor for closing logic.
Synchronism Situation Synchronism check Closing logic Line voltage levels Busbar voltage levels
(1) V
L
< (V
1
& V
2
)< V
H
Not permitted Not permitted V1 > dead line level
V1 < live line level
V2 > dead bus level
V2 < live bus level
(2) (V
1
& V
2
) > V
H
Permitted Live Line – Live Bus V1 > live line level V2 > live bus level
(3) (V
1
& V
2
) < V
L
Not permitted Dead Line – Dead Bus V1 < dead line level V2 < dead bus level
(4) (V
1
< V
L
) & (V
L
< V
2
< V
H
) Not permitted Not permitted V1 < dead line level V2 > dead bus level
V2 < live bus level
(5) (V
2
< V
L
) & (V
L
< V
1
< V
H
) Not permitted Not permitted V1 > dead line level
V1 < live line level
V2 < dead bus level
(6) (V
1
< V
L
) & (V
2
> V
H
) Not permitted Dead Line – Live Bus V1 < dead line level V2 > live bus level
(7) (V
2
< V
L
) & (V
1
> V
H
) Not permitted Live Line – Dead Bus V1 > live line level V2 < dead bus level