Intel
®
81341 and 81342—Address Translation Unit (PCI-X)
Intel
®
81341 and 81342 I/O Processors
Developer’s Manual
December 2007
84
Order Number: 315037-002US
2.3.2
Outbound Byte Swapping
When enabled, the swapping occurs as described in
Swapping for Transaction with Byte Count of 1” on page 84
Swapping for Transaction with Byte Count of 2” on page 84
Byte Swapping for Transaction with Byte Count of 3 or Larger” on page 84
. The bytes
are swapped within a 32-bit DWORD and the type of byte swapping performed is
determined by the transaction byte count. For Byte Count of 3 or larger transactions,
no byte swapping is performed.
Note:
The byte swapping capability of the ADMA unit should be used to swap bytes within
each DWORD for PCI-to-Memory Read/Write DMA transfers.
Figure 11. Outbound Byte Swapping for Transaction with Byte Count of 1
Figure 12. Outbound Byte Swapping for Transaction with Byte Count of 2
Figure 13. Outbound Byte Swapping for Transaction with Byte Count of 3 or Larger
Byte 0 Byte 0
Word 0 [31:24]
Word 0 [23:16]
Word 0 [15:8]
Word 0 [7:0]
Word 0 [7:0]
Word 0 [15:8]
Word 0 [23:16]
Word 0 [31:24]
32-Bit Word on Internal Data Bus
32-Bit Word on PCI Bus
+3
+2
+1
+0
B6191-01
Byte 0 Byte 0
Word 0 [31:24]
Word 0 [23:16]
Word 0 [15:8]
Word 0 [7:0]
Word 0 [15:8]
Word 0 [7:0]
Word 0 [31:24]
Word 0 [23:16]
32-Bit Word on Internal Data Bus
32-Bit Word on PCI Bus
+3
+2
+1
+0
B6192-01
Byte 0 Byte 0
Word 0 [31:24]
Word 0 [23:16]
Word 0 [15:8]
Word 0 [7:0]
Word 0 [31:24]
Word 0 [23:16]
Word 0 [15:8]
Word 0 [7:0]
32-Bit Word on Internal Data Bus
32-Bit Word on PCI Bus
+3
+2
+1
+0
B6193-01