Intel
®
81341 and 81342 I/O Processors
December 2007
Developer’s Manual
Order Number: 315037-002US
599
DDR SDRAM Memory Controller—Intel
®
81341 and 81342
Table 366. SDRAM Extended Mode Register (EMRS) Definition
Extended Mode
Register Bit
Extended Mode
Register Field
Field Definition
14:13
EMRS
MRS Mode (a value of 01b selects Extended Mode Register
Select)
12
OUT
Output Buffer Enable/Disable
11
RDQS
RDQS Enable
10
DQS#
DQS# Enable
09:07
OCD Program
OCD Operation
06
RTT
RTT
05:03
Posted CAS#
Posted CAS# Additive latency (AL)
02
RTT
RTT
01
ODS
Out Drive Strength
00
DLL
DLL Enable
Table 367. SDRAM Mode Register (MRS) Definition
Mode Register Bit Mode Register
Field
Field Definition
14:13
MRS
MRS Mode Set (a value of 00b selects Mode Register select)
12
PD
PD Mode (Power-Down Mode)
11:09
WR
Write Recovery
08
DLL
DLL Reset
07
TM
Mode
06:04
CAS# Latency CAS Latency
03
BT
Burst Type
02:00
BL
Burst Length