GE Power Management
ALPS Advanced Line Protection System
1-33
1 PRODUCT DESCRIPTION
1.8 PROTECTION SCHEMES
1
1.8.7 HYBRID SCHEME
Figure 1–18: HYBRID LOGIC DIAGRAM on page 1–34 is the logic diagram for the Hybrid scheme. A Hybrid scheme com-
bines aspects of a tripping scheme with aspects of a blocking scheme, but it is perhaps easiest to explain as an enhanced
POTT scheme.
A pure POTT scheme cannot trip any terminal of the protected line for an internal fault that produces little or no fault current
at one terminal, such that the trip functions there do not operate. A Hybrid scheme incorporates an echo or repeat transmit-
ter-keying circuit that permits the strong in-feed end(s) to trip. A weak in-feed trip circuit permits the weak in-feed end to trip
almost simultaneously with the strong in-feed end.
A Hybrid scheme requires reverse-looking blocking functions to implement these enhancements and the same transient
blocking logic used in a Blocking scheme. Like a POTT scheme, a Hybrid scheme generally uses a frequency-shift (FSK)
channel.
When an internal fault produces sufficient fault current to operate the tripping functions at each terminal of the line, the
Hybrid scheme operates exactly like the POTT1 scheme described earlier. When a weak- or zero-in-feed condition exists at
one terminal, then the echo keying circuit is used to permit the strong in-feed terminal to trip. A selectable weak in-feed trip-
ping circuit may be used to trip the weak in-feed terminal.
Assume that an internal fault on the protected line is not detected at a weak in-feed terminal. At the strong in-feed termi-
nal(s), the transmitter is keyed to the trip frequency. At the weak in-feed terminal, the blocking functions have not operated
and the receiver produces an output when it receives the trip frequency. This output is applied to timer TL11 and AND102
via OR101. AND102 produces an output until timer TL11 times out 80 ms after receipt of the trip signal. An AND102 output
initiates keying of the transmitter via OR404 and AND204. Transmission (echo) of the trip signal then allows the strong ter-
minal(s) to trip.
For three terminal line applications, the pickup time of TL11 is decreased from 80 to 50 ms and the dropout time of TL25 is
increased from 30 to 60 ms. This is to maintain security when an external fault is cleared quickly. These changes occur
automatically when Protection Setting 1202: NUMRCVR (number of receivers) is set at 2, provided that the select scheme
Setting (Protection Setting 1201: PICKSCHEME) is set for HYBRID.
The echo circuit plus OR305, OR306, AND305, AND306, TL17, AND405, and TL16 comprise the weak in-feed tripping cir-
cuit. For the same internal fault condition outlined in the previous paragraph, AND405 produces an output because of the
following:
•
The NOT input to AND405 is satisfied because there is no output from the blocking functions.
•
There is an output from OR306, since either a) FD has operated, or b) V1 has dropped out.
•
The other two inputs to AND405 are satisfied, since a trip signal is being received and timer TL11 has not timed out
yet.
The output from AND406 energizes timer TL16, which produces a trip output when it times out. The adjustable time-delay
pickup of timer TL16 is provided for security against any spurious receiver output that might occur during fault conditions.
