GE Power Management
ALPS Advanced Line Protection System
E-
1
APPENDIX E
E.1 FIGURES AND TABLES
E
APPENDIX E FIGURES AND TABLESE.1 FIGURES AND TABLES
E.1.1 LIST OF FIGURES
Figure 1–1: GROUND DISTANCE QUADRILATERAL CHARACTERISTIC ...................................................................................... 1-6
Figure 1–2: TENT CHARACTERISTIC ............................................................................................................................................... 1-7
Figure 1–3: POTENTIAL FUSE FAILURE LOGIC DIAGRAMS........................................................................................................ 1-11
Figure 1–4: LINE PICKUP LOGIC DIAGRAM (THREE PHASE TRIPPING).................................................................................... 1-12
Figure 1–5: LINE PICKUP LOGIC DIAGRAM (SINGLE PHASE TRIPPING) ................................................................................... 1-13
Figure 1–6: REMOTE-OPEN DETECTOR LOGIC (ROD)................................................................................................................ 1-14
Figure 1–7: OSB R-X DIAGRAM ...................................................................................................................................................... 1-15
Figure 1–8: OSB LOGIC DIAGRAMS ............................................................................................................................................... 1-15
Figure 1–9: SWITCH SELECTION OF ACTIVE SETTING GROUP................................................................................................. 1-18
Figure 1–10: STEP DISTANCE LOGIC DIAGRAM .......................................................................................................................... 1-24
Figure 1–11: INTERCONNECTION DIAGRAM FOR PUTT/POTT WITH NS40A ............................................................................ 1-25
Figure 1–12: PUTT LOGIC DIAGRAM.............................................................................................................................................. 1-26
Figure 1–13: PERMISSIVE OVERREACH TRANSFER TRIP (POTT1)........................................................................................... 1-28
Figure 1–14: POTT WITH BLOCKING FUNCTIONS (POTT2)......................................................................................................... 1-29
Figure 1–15: BLOCKING SCHEME LOGIC DIAGRAM .................................................................................................................... 1-31
Figure 1–16: INTERCONNECTION DIAGRAM FOR BLOCKING SCHEME WITH CS28A ............................................................. 1-32
Figure 1–17: INTERCONNECTION DIAGRAM FOR BLOCKING SCHEME WITH CS61C............................................................. 1-32
Figure 1–18: HYBRID LOGIC DIAGRAM ......................................................................................................................................... 1-34
Figure 1–19: SINGLE PHASE TRIPPING LOGIC (EXCEPT FOR HYBRID SCHEME) ................................................................... 1-35
Figure 1–20: SINGLE PHASE TRIPPING LOGIC (HYBRID SCHEME) ........................................................................................... 1-36
Figure 1–21: OPEN POLE DETECTION LOGIC .............................................................................................................................. 1-37
Figure 1–22: INTER-CIRCUIT FAULT EXAMPLE ............................................................................................................................ 1-38
Figure 1–23: OST MHO CHARACTERISTIC.................................................................................................................................... 1-42
Figure 1–24: OUT-OF-STEP TRIPPING LOGIC .............................................................................................................................. 1-42
Figure 1–25: COMPENSATED POSITIVE-SEQUENCE OVERVOLTAGE ...................................................................................... 1-44
Figure 1–26: THREE-POLE TRIP ENABLE OUTPUT...................................................................................................................... 1-47
Figure 1–27: ELEMENTARY DIAGRAM WITH DEFAULT I/O (SINGLE PHASE TRIPPING).......................................................... 1-49
Figure 1–28: ELEMENTARY DIAGRAM WITH DEFAULT I/O (THREE PHASE TRIPPING)........................................................... 1-50
Figure 1–29: ELEMENTARY DIAGRAM (SINGLE PHASE TRIPPING) ........................................................................................... 1-51
Figure 1–30: ELEMENTARY DIAGRAM (THREE PHASE TRIPPING) ............................................................................................ 1-52
Figure 2–1: TRIP CIRCUIT MONITOR ............................................................................................................................................... 2-3
Figure 2–2: ALLOWABLE ZONE 1 REACH (WHEN USED WITH CVTs) .......................................................................................... 2-9
Figure 2–3: POWER SYSTEM ONE LINE DIAGRAM WITH SERIES CAPACITORS ..................................................................... 2-10
Figure 2–4: TENT CHARACTERISTIC ............................................................................................................................................. 2-12
Figure 2–5: MAXIMUM ALLOWABLE REACH ................................................................................................................................. 2-13
Figure 2–6: OPERATING TIME CHARACTERISTIC........................................................................................................................ 2-14
Figure 2–7: MODIFIED GDOC LOGIC, MHO2GDOC ...................................................................................................................... 2-15
Figure 2–8: GROUND DISTANCE FUNCTION CHARACTERISTIC................................................................................................ 2-18
Figure 2–9: R-X DIAGRAM FOR ZONE 4 DISTANCE FUNCTIONS ............................................................................................... 2-18
Figure 2–10: ZONE 4 FAULT EXAMPLE.......................................................................................................................................... 2-19
Figure 2–11: NT/NB FUNCTIONS .................................................................................................................................................... 2-24
Figure 2–12: ROD LOGIC DIAGRAM ............................................................................................................................................... 2-31
Figure 2–13: TL5PICKUP / TL6PICKUP REPRESENTATION......................................................................................................... 2-35
Figure 2–14: OSB FUNCTION CHARACTERISTIC ......................................................................................................................... 2-38
Figure 2–15: OST CHARACTERISTIC ............................................................................................................................................. 2-39
Figure 2–16: OST REACH CHARACTERISTIC ............................................................................................................................... 2-40
Figure 2–17: OUT OF STEP TRIPPING LOGIC............................................................................................................................... 2-41
Figure 2–18: INVERSE CURVE........................................................................................................................................................ 2-48
Figure 2–19: VERY INVERSE CURVE............................................................................................................................................. 2-49
Figure 2–20: EXTREMELY INVERSE CURVE................................................................................................................................. 2-50
Figure 3–1: DIMENSIONS .................................................................................................................................................................. 3-1
Figure 3–2: FRONT AND REAR VIEW............................................................................................................................................... 3-2
Figure 3–3: CIRCUIT BOARD LOCATIONS....................................................................................................................................... 3-3
Figure 3–4: ALPS SYSTEM BLOCK DIAGRAM ................................................................................................................................. 3-4
Figure 3–5: INPUT BOARD DIAGRAM............................................................................................................................................... 3-7
Figure 3–6: BLOCK DIAGRAM OF THE MAGNETICS MODULE ...................................................................................................... 3-8
Figure 3–7: BLOCK DIAGRAM OF THE COMMUNICATIONS MODULE .......................................................................................... 3-9
Figure 3–8: BLOCK DIAGRAM OF THE DIGITAL OUPUT / POWER SUPPLY .............................................................................. 3-10
Figure 3–9: BLOCK DIAGRAM OF THE DSP / COMM / LUI MODULE ........................................................................................... 3-11
Figure 3–10: BLOCK DIAGRAM OF THE SYSTEM PROCESSOR (i960 CPU) .............................................................................. 3-12
Figure 4–1: DIGITAL OUTPUTS TEST CONNECTIONS ................................................................................................................... 4-9
Figure 4–2: CONFIGURABLE INPUT/OUTPUT TEST CONNECTIONS ......................................................................................... 4-11