COPYRIGHT © 2001 CANON INC. CANON CLC1000/1000S/3100 REV.2 MAY 2001 PRINTED IN JAPAN (IMPRIME AU JAPON)
A-23
APPENDIX
DC Controller Circuit Diagram (9/36)
+5V
RA2222
2
3
4
5
6
7
8
9
DQ1
DQ0
W*
R*
S*
BM
INTR
RXD3
TXD3
RXD2
TXD2
RXD1
TXD1
CTS3*
CTS2*
CTS1*
CLK
P12
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VCC
A0
A1
A2
A3
A4
A5
A6
64
63
62
61
60
59
58
57
56
55
54
53
52
51
CNVSS
RST*
INT
P10
XIN
XOUT
VSS
P07
P06
P05
P04
P03
P02
P01
19
20
21
22
23
24
25
26
27
28
29
30
31
32
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1
2
1
0
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
A7
PA
0
PA
1
PA
2
PA
3
PA
4
PA
5
PA
6
PA
7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
P00
Q2325
+5V
RA2224
2
3
4
5
6
7
8
9
+5V
RA2223
2
3
4
5
6
7
8
9
1
+5V
RA2225
2
3
4
5
6
7
8
9
1
1
1
C2341
C2342
12
RESET*
+5V
C2340
AB
US<23.,0>
DB
US<15.,0>
ML
WR*
MRD*
IPCCS*
RXD3
TXD3
RXD2
TXD2
RXD1
TXD1
X2203
Q2451
LS240
G*
A4
Y4
A3
Y3
A2
Y2
A1
Y1
J2202 J2202 J2202 J2202
ChkLed0
ChkLed1
ChkLed2
ChkLed3
21
8
41
6
61
4
8
1
ChkLed0
ChkLed1
ChkLed2
ChkLed3
12
A2
A3
A4
A5
Q2451
LS240
G*
A4
Y4
A3
Y3
A2
Y2
A1
Y1
J2202 J2202 J2202 J2202
ChkLed4
ChkLed5
ChkLed6
ChkLed7
11
9
13
7
15
5
17
19
ChkLed4
ChkLed5
ChkLed6
ChkLed7
3
A6
A7
A8
A9
Q2455
LS240
G*
Y4
A4
Y3
A3
Y2
A2
Y1
A1
J2202 J2202 J2202 J2202
ChkK
e
y
0
ChkK
e
y
1
ChkK
e
y
2
ChkK
e
y
3
18
2
16
4
14
6
12
1
ChkK
e
y
0
ChkK
e
y
1
ChkK
e
y
2
ChkK
e
y
3
8
A10
A11
B2
B3
Q2452
LS240
G*
A4
Y4
A3
Y3
A2
Y2
A1
Y1
J2202 J2202 J2202 J2202
ChkOut0
ChkOut1
ChkOut2
ChkOut3
21
8
41
6
61
4
8
1
ChkOut0
ChkOut1
ChkOut2
ChkOut3
12
B4
B5
B6
B7
Q2452
LS240
G*
A4
Y4
A3
Y3
A2
Y2
A1
Y1
J2202 J2202 J2202 J2202
ChkOut4
ChkOut5
ChkOut6
ChkOut7
11
9
13
7
15
5
17
19
ChkOut4
ChkOut5
ChkOut6
ChkOut7
3
B8
B9
B10
B11
J2202
A1
J2202
B1
1
+5V
RA2231
2
3
4
5
LS240
PTXD
3
17
Q2455
J2230
LS240
PRXD
51
5
2
J2230
1
3
Q2455
R2671
J2230
19
19
+5V
LS240
RT
S
7
13
Q2455
J2230
LS240
CTS
PTXD
PRXD
RT
S
CTS
91
1
4
5
Q2455
R2670
J2230
6
J2230
19
+5V
+5V
RS-232C
INTERF
A
C
E
CHECKER
INTERF
A
C
E
IPC INTERF
A
C
E
CONNECT
T
O
SO
T
O
R
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