⎯
133
⎯
6 F 2 S 0 8 4 6
To determine the dead time, it is essential to find an optimal value while taking factors,
de-ionization time and power system stability, into consideration which normally contradict one
other.
Normally, a longer de-ionization time is required for a higher line voltage or larger fault current.
For three-phase autoreclose, the dead time is generally 15 to 30 cycles. In single-phase
autoreclose, the secondary arc current induced from the healthy phases may affect the
de-ionization time. Therefore, it is necessary to set a longer dead time for single-phase autoreclose
compared to that for three-phase autoreclose.
In three-phase autoreclose, if the voltage and synchronism check does not operate within the
period of time set on the delayed pick-up timer TRR which is started at the same time as the dead
time counter TTPR1 is started, reclosing is not performed and three-phase autoreclose is reset to
its initial state. Therefore, for example, TRR is set to the time setting of the TTPR1 plus 100 ms.
The TEVLV determines the possibility of three-phase reclosing for an evolving fault.
When the TEVLV is set to the same setting as the TSPR, three-phase reclosing is performed for all
evolving faults. As the setting for the TEVLV is made shorter, the possibility of three-phase
reclosing for an evolving fault becomes small and that of three-phase final tripping becomes large.
For the two-breaker autoreclose, the following additional settings are required.
Element Range
Step Default Remarks
VTs2
1 - 20000
1
2000
VT ratio for voltage and synchronism check SYN2
TSPR2
0.1 – 10.0s
0.1s
0.1s
Dead time for single-phase autoreclose of follower breaker
TTPR2
0.1 – 10.0s
0.1s
0.1s
Dead time for three-phase autoreclose of follower breaker
TRDY2
5 – 300s
1s
60s
Reclaim time of follower breaker
SYN2
Synchronism
check
SY2
θ
5 – 75°
1°
30°
SY2UV 10 – 150V
1V
83V
SY2OV 10 – 150V
1V
51V
OVL2
10 – 150V
1V
51V
Live line check
UVL2
10 – 150V
1V
13V
Dead line check
TSYN2
0.01 – 10.00s
0.01s
1.00s
Synchronism check time
TLBD2
0.01 – 1.00s
0.01s
0.05s
Voltage check time
TDBL2
0.01 – 1.00s
0.01s
0.05s
Voltage check time
TW2
0.1 – 10.0s
0.1s
0.2s
Reclosing signal output time
[ARC-CB] ONE/O1/O2/L1/L2
L1
Two breaker autoreclose mode
[VCHK] OFF/LB1/LB2/DB/SYN LB1
Energizing
direction
Note :
[ARC-CB]
is set to "
ONE
" only when the relay is applied to one-breaker system. Trip and reclose
commands are output only for CB1(bus CB).
2.6.4 Autoreclose Output Signals
The autoreclose scheme logic has two output reclosing signals: ARC1 and ARC2. ARC1 is a
reclosing signal for a single breaker autoreclose or a reclosing signal for the busbar breaker in a
two-breaker autoreclose scheme.
ARC2 is the reclosing signal for the center breaker of the two-breaker autoreclose scheme.
The assignment of these reclosing signals to the output relays can be configured, which is done
using the setting menu. For more information on this, see Section 3.2.2 and 4.2.6.9. For the default
setting, see Appendix D.
Summary of Contents for GRZ100 B Series
Page 264: ... 263 6 F 2 S 0 8 4 6 Appendix A Block Diagram ...
Page 271: ... 270 6 F 2 S 0 8 4 6 ...
Page 272: ... 271 6 F 2 S 0 8 4 6 Appendix B Signal List ...
Page 307: ... 306 6 F 2 S 0 8 4 6 ...
Page 308: ... 307 6 F 2 S 0 8 4 6 Appendix C Variable Timer List ...
Page 310: ... 309 6 F 2 S 0 8 4 6 Appendix D Binary Input Output Default Setting List ...
Page 321: ... 320 6 F 2 S 0 8 4 6 ...
Page 322: ... 321 6 F 2 S 0 8 4 6 Appendix E Details of Relay Menu and LCD Button Operation ...
Page 331: ... 330 6 F 2 S 0 8 4 6 ...
Page 340: ... 339 6 F 2 S 0 8 4 6 Appendix G Typical External Connections ...
Page 377: ... 376 6 F 2 S 0 8 4 6 ...
Page 384: ... 383 6 F 2 S 0 8 4 6 Appendix J Return Repair Form ...
Page 388: ... 387 6 F 2 S 0 8 4 6 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Page 389: ... 388 6 F 2 S 0 8 4 6 ...
Page 390: ... 389 6 F 2 S 0 8 4 6 Appendix K Technical Data ...
Page 401: ... 400 6 F 2 S 0 8 4 6 ...
Page 402: ... 401 6 F 2 S 0 8 4 6 Appendix L Symbols Used in Scheme Logic ...
Page 405: ... 404 6 F 2 S 0 8 4 6 ...
Page 406: ... 405 6 F 2 S 0 8 4 6 Appendix M Example of Setting Calculation ...
Page 417: ... 416 6 F 2 S 0 8 4 6 ...
Page 418: ... 417 6 F 2 S 0 8 4 6 Appendix N IEC60870 5 103 Interoperability and Troubleshooting ...
Page 434: ... 433 6 F 2 S 0 8 4 6 Appendix P Inverse Time Characteristics ...
Page 437: ... 436 6 F 2 S 0 8 4 6 ...
Page 438: ... 437 6 F 2 S 0 8 4 6 Appendix Q Failed Module Tracing and Replacement ...
Page 444: ... 443 6 F 2 S 0 8 4 6 Appendix R Ordering ...
Page 447: ......