⎯
75
⎯
6 F 2 S 0 8 4 6
Overvoltage Inverse Time
Curves
0.100
1.000
10.000
100.000
1000.000
1
1.5
2
2.5
3
Applied Voltage (x Vs)
O
p
er
at
in
g
T
im
e
(
s
e
cs)
T MS = 1
T MS = 2
T MS = 5
T MS = 10
Figure 2.4.9.1 IDMT Characteristic
Scheme Logic
Figures 2.4.9.2 and 2.4.9.4 show the scheme logic of the OVS1 and OVG1 overvoltage protection
with selective definite time or inverse time characteristic. The definite time protection is selected
by setting [OV
∗
1EN] to “DT”, and trip signal OV
∗
1_TRIP is given through the delayed pick-up
timer TO
∗
1. The inverse time protection is selected by setting [OV
∗
1EN] to “IDMT”, and trip
signal OV
∗
1_TRIP is given.
The OVS1 and OVG1 protections can be disabled by the scheme switch [OV
∗
1EN] or the PLC
signal OV
∗
1_BLOCK.
These protections are available to trip instantaneously by the PLC signal OV
∗
1_INST_TP except
for [OV
∗
1EN]=“OFF” setting.
Figures 2.4.9.3 and 2.4.9.5 show the scheme logic of the OVS2 and OVG2 protection with definite
time characteristic. The OV
∗
2 gives the PLC signal OV
∗
2_ALARM through delayed pick-up
timer TO
∗
2.
The OV
∗
2_ALARM can be blocked by incorporated scheme switch [OV
∗
2EN] and the PLC
signal OV
∗
2_BLOCK.
These protections are also available to alarm instantaneously by the PLC signal OV
∗
2_INST_TP.
Summary of Contents for GRZ100 B Series
Page 264: ... 263 6 F 2 S 0 8 4 6 Appendix A Block Diagram ...
Page 271: ... 270 6 F 2 S 0 8 4 6 ...
Page 272: ... 271 6 F 2 S 0 8 4 6 Appendix B Signal List ...
Page 307: ... 306 6 F 2 S 0 8 4 6 ...
Page 308: ... 307 6 F 2 S 0 8 4 6 Appendix C Variable Timer List ...
Page 310: ... 309 6 F 2 S 0 8 4 6 Appendix D Binary Input Output Default Setting List ...
Page 321: ... 320 6 F 2 S 0 8 4 6 ...
Page 322: ... 321 6 F 2 S 0 8 4 6 Appendix E Details of Relay Menu and LCD Button Operation ...
Page 331: ... 330 6 F 2 S 0 8 4 6 ...
Page 340: ... 339 6 F 2 S 0 8 4 6 Appendix G Typical External Connections ...
Page 377: ... 376 6 F 2 S 0 8 4 6 ...
Page 384: ... 383 6 F 2 S 0 8 4 6 Appendix J Return Repair Form ...
Page 388: ... 387 6 F 2 S 0 8 4 6 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Page 389: ... 388 6 F 2 S 0 8 4 6 ...
Page 390: ... 389 6 F 2 S 0 8 4 6 Appendix K Technical Data ...
Page 401: ... 400 6 F 2 S 0 8 4 6 ...
Page 402: ... 401 6 F 2 S 0 8 4 6 Appendix L Symbols Used in Scheme Logic ...
Page 405: ... 404 6 F 2 S 0 8 4 6 ...
Page 406: ... 405 6 F 2 S 0 8 4 6 Appendix M Example of Setting Calculation ...
Page 417: ... 416 6 F 2 S 0 8 4 6 ...
Page 418: ... 417 6 F 2 S 0 8 4 6 Appendix N IEC60870 5 103 Interoperability and Troubleshooting ...
Page 434: ... 433 6 F 2 S 0 8 4 6 Appendix P Inverse Time Characteristics ...
Page 437: ... 436 6 F 2 S 0 8 4 6 ...
Page 438: ... 437 6 F 2 S 0 8 4 6 Appendix Q Failed Module Tracing and Replacement ...
Page 444: ... 443 6 F 2 S 0 8 4 6 Appendix R Ordering ...
Page 447: ......