⎯
214
⎯
6 F 2 S 0 8 4 6
•
Enter 1 and press the ENTER key to operate the output relays forcibly.
•
After completing the entries, press the END key. Then the LCD displays the screen shown
below.
/ 3
B O
K e e p p r e s s i n
o
t
1
g
o p e r a t e .
P r e s s
C A N C E L
t o
c a n c e l .
•
Keep pressing the 1 key to operate the assigned output relays.
•
Release pressing the 1 key to reset the operation.
•
Press
the CANCEL key to return to the upper screen.
4.2.7.4 Timer
The pick-up or drop-off delay time of the variable timer used in the scheme logic can be measured
with monitoring jacks A and B. Monitoring jacks A and B are used to observe the input signal and
output signal to the timer respectively.
•
Press 4 (= Timer) on the "Test" screen to display the "Timer" screen.
/ 2
T i m e r
1 /
1
T i m e r (
1 -
6 0 ) :
1
•
Enter the number corresponding to the timer to be observed and press the ENTER key. The
timers and related numbers are listed in Appendix C.
•
Press
the END key to display the following screen.
/ 2
T i m e r
P r e s s
E N T E R
t o
o p e r a t e .
P r e s s
C A N C E L
t o
c a n c e l .
•
Press
the
ENTER
key to operate the timer. The "TESTING" LED turns on, and the timer is
initiated and the following display appears. The input and output signals of the timer can be
observed at monitoring jacks A and B respectively. The LEDs above monitoring jacks A or B
are also lit if the input or output signal exists.
/ 2
T i m e r
O p e r a t i n g . . .
P r e s s
E N D
t o
r e s e t .
P r e s s
C A N C E L
t o
c a n c e l .
•
Press
the
C A N C E L
key to test other timers.
•
Press
the
END
key to reset the input signal to the timer. The "TESTING" LED turns off.
To measure the drop-off delayed time, press the
EN D
key after the LED above jack B lights.
4.2.7.5 Logic Circuit
It is possible to observe the binary signal level on the signals listed in Appendix B with monitoring
Summary of Contents for GRZ100 B Series
Page 264: ... 263 6 F 2 S 0 8 4 6 Appendix A Block Diagram ...
Page 271: ... 270 6 F 2 S 0 8 4 6 ...
Page 272: ... 271 6 F 2 S 0 8 4 6 Appendix B Signal List ...
Page 307: ... 306 6 F 2 S 0 8 4 6 ...
Page 308: ... 307 6 F 2 S 0 8 4 6 Appendix C Variable Timer List ...
Page 310: ... 309 6 F 2 S 0 8 4 6 Appendix D Binary Input Output Default Setting List ...
Page 321: ... 320 6 F 2 S 0 8 4 6 ...
Page 322: ... 321 6 F 2 S 0 8 4 6 Appendix E Details of Relay Menu and LCD Button Operation ...
Page 331: ... 330 6 F 2 S 0 8 4 6 ...
Page 340: ... 339 6 F 2 S 0 8 4 6 Appendix G Typical External Connections ...
Page 377: ... 376 6 F 2 S 0 8 4 6 ...
Page 384: ... 383 6 F 2 S 0 8 4 6 Appendix J Return Repair Form ...
Page 388: ... 387 6 F 2 S 0 8 4 6 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Page 389: ... 388 6 F 2 S 0 8 4 6 ...
Page 390: ... 389 6 F 2 S 0 8 4 6 Appendix K Technical Data ...
Page 401: ... 400 6 F 2 S 0 8 4 6 ...
Page 402: ... 401 6 F 2 S 0 8 4 6 Appendix L Symbols Used in Scheme Logic ...
Page 405: ... 404 6 F 2 S 0 8 4 6 ...
Page 406: ... 405 6 F 2 S 0 8 4 6 Appendix M Example of Setting Calculation ...
Page 417: ... 416 6 F 2 S 0 8 4 6 ...
Page 418: ... 417 6 F 2 S 0 8 4 6 Appendix N IEC60870 5 103 Interoperability and Troubleshooting ...
Page 434: ... 433 6 F 2 S 0 8 4 6 Appendix P Inverse Time Characteristics ...
Page 437: ... 436 6 F 2 S 0 8 4 6 ...
Page 438: ... 437 6 F 2 S 0 8 4 6 Appendix Q Failed Module Tracing and Replacement ...
Page 444: ... 443 6 F 2 S 0 8 4 6 Appendix R Ordering ...
Page 447: ......