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6 F 2 S 0 8 4 6
2.4.3.4 Blocking Overreach Protection
Application
In blocking overreach protection (BOP), each terminal normally transmits a trip permission
signal, and transmits a trip block signal if the reverse looking Z4 operates and the forward
overreaching element does not operate. Tripping of the local circuit breaker is performed on
condition that the forward overreaching element has operated and a trip permission signal has
been received. As the forward overreaching element, it is possible to use zone 2 or zone 3.
If signal modulation is performed by an ON/OFF method, the signal is not normally transmitted
and a trip block signal is transmitted only when the reverse looking element operates. Tripping is
performed on condition that the forward overreaching element has operated and no signal has been
received. In this signaling system, the signal transmitted is a trip block signal and transmission of
this signal is only required in the event of an external fault. Therefore, even if power line carrier is
used, there will be no failure to operate or false operation due to attenuation of signals caused by
signal transmission through the fault.
The BOP receives a trip permission signal all the time. Therefore, when a forward external fault
occurs, the infeed terminal on which the forward overreaching element has operated attempts to
perform instantaneous tripping. At this time, at the remote outfeed terminal, the reverse looking
element operates and transmits a trip block signal. This signal is received at the infeed terminal
after a channel delay time. Therefore, a short delay is required for the tripping to check for the
reception of a trip block signal.
The BOP performs fast tripping for any fault along the whole length of the protected line even if an
open terminal exists. A strong infeed terminal operates for all internal faults even if a weak infeed
terminal exists. Therefore, no echo function is required. However, since no weak infeed logic is
applicable to the BOP, the weak infeed terminal cannot operate.
When a sequential fault clearance occurs for a fault on a parallel line, the direction of the current
on the healthy line is reversed. The status of the forward overreaching element changes from an
operating to a reset state at the terminal where the current is reversed from the inward direction to
outward direction, and from a non-operating status to an operating status at the other terminal. In
this process, if the operating periods of the forward overreaching element of both terminals
overlap, the healthy line may be tripped erroneously. To prevent this, current reversal logic is
provided. (See Section 2.4.3.6 for current reversal.)
Scheme Logic
Figure 2.4.3.4 shows the scheme logic of the BOP. The logic level of transmit signal CS and
receive signal R1-CR is "1" for a trip block signal and "0" for a trip permission signal.
The transmit signal is controlled in the BOP as follows:
In the normal state, the logic level of transmit signal CS is 0, and a trip permission signal is
transmitted. If the reverse looking Z4 operates and at the same time the forward overreaching
element zone 2 or zone 3 selected by the scheme switch [ZONESEL] does not operate, CS
becomes 1 and a trip block signal is transmitted. When this condition continues for 20 ms or more,
current reversal logic is picked up and a drop-off delay time of TREBK setting is given to reset the
transmission of the trip block signal.
Transmission of a trip permission signal continues for the TSBCT setting even after the local
terminal is tripped, assuring command tripping of the remote terminal.
The BOP outputs single-phase tripping signal S-TRIP or three-phase tripping signal M-TRIP to
the local terminal when zone 3 or zone 2 operates and at the same time the trip permission signal is
received (R1-CR=0). The delayed pick-up timer TCHD is provided to allow for the transmission
delay for receipt of the trip block signal from the remote terminal in the event of a forward external
fault.
To select the faulted phase reliably, phase selection is performed using the phase selection element
Summary of Contents for GRZ100 B Series
Page 264: ... 263 6 F 2 S 0 8 4 6 Appendix A Block Diagram ...
Page 271: ... 270 6 F 2 S 0 8 4 6 ...
Page 272: ... 271 6 F 2 S 0 8 4 6 Appendix B Signal List ...
Page 307: ... 306 6 F 2 S 0 8 4 6 ...
Page 308: ... 307 6 F 2 S 0 8 4 6 Appendix C Variable Timer List ...
Page 310: ... 309 6 F 2 S 0 8 4 6 Appendix D Binary Input Output Default Setting List ...
Page 321: ... 320 6 F 2 S 0 8 4 6 ...
Page 322: ... 321 6 F 2 S 0 8 4 6 Appendix E Details of Relay Menu and LCD Button Operation ...
Page 331: ... 330 6 F 2 S 0 8 4 6 ...
Page 340: ... 339 6 F 2 S 0 8 4 6 Appendix G Typical External Connections ...
Page 377: ... 376 6 F 2 S 0 8 4 6 ...
Page 384: ... 383 6 F 2 S 0 8 4 6 Appendix J Return Repair Form ...
Page 388: ... 387 6 F 2 S 0 8 4 6 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Page 389: ... 388 6 F 2 S 0 8 4 6 ...
Page 390: ... 389 6 F 2 S 0 8 4 6 Appendix K Technical Data ...
Page 401: ... 400 6 F 2 S 0 8 4 6 ...
Page 402: ... 401 6 F 2 S 0 8 4 6 Appendix L Symbols Used in Scheme Logic ...
Page 405: ... 404 6 F 2 S 0 8 4 6 ...
Page 406: ... 405 6 F 2 S 0 8 4 6 Appendix M Example of Setting Calculation ...
Page 417: ... 416 6 F 2 S 0 8 4 6 ...
Page 418: ... 417 6 F 2 S 0 8 4 6 Appendix N IEC60870 5 103 Interoperability and Troubleshooting ...
Page 434: ... 433 6 F 2 S 0 8 4 6 Appendix P Inverse Time Characteristics ...
Page 437: ... 436 6 F 2 S 0 8 4 6 ...
Page 438: ... 437 6 F 2 S 0 8 4 6 Appendix Q Failed Module Tracing and Replacement ...
Page 444: ... 443 6 F 2 S 0 8 4 6 Appendix R Ordering ...
Page 447: ......